From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 87D27C87FCB for ; Fri, 8 Aug 2025 16:29:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:In-Reply-To:From:References:CC:To:Subject:MIME-Version:Date: Message-ID:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=4ACrg0VZ/ROx1Hmh9K1St6WzunO2A1EMiSibHesgeF0=; b=NqHtqEj7O2OTn1wexR+48wNyiJ V5Iw5ZTa9QNC7SjyY9YI2EWMfCZibSWSOO9dUSlLkXUl1G3DFllb3CRqVmi9MY+JaDauYd0OZoZoU 6/Y8x7cfj9K6eOaKI6Y562tUNNiHzpK2lrA/jE+yAxuaznHn9eigWfx9pDgJjvdDCHmPKEP0ESfqJ pqYj/gCzZ4PrWFf5aLrATSKOWerz5c8vsz85YkWrjSm7hcFBp5f4SWslJerbXIBwNSa0Q1VhfXG9r 5ozz6i9YT4S6hSzAv9QPG8Vvdpm9Q6UztyB1k40IzYCYrM0DjbQFeI/E3Zm/t8DHiP2yKr+9vaEPf cnSIfbQg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1ukPyQ-00000003JqQ-305L; Fri, 08 Aug 2025 16:29:42 +0000 Received: from lelvem-ot01.ext.ti.com ([198.47.23.234]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1ukPvs-00000003JZE-1CoJ for linux-arm-kernel@lists.infradead.org; Fri, 08 Aug 2025 16:27:05 +0000 Received: from lelvem-sh02.itg.ti.com ([10.180.78.226]) by lelvem-ot01.ext.ti.com (8.15.2/8.15.2) with ESMTP id 578GQZeC634811; Fri, 8 Aug 2025 11:26:35 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1754670395; bh=4ACrg0VZ/ROx1Hmh9K1St6WzunO2A1EMiSibHesgeF0=; h=Date:Subject:To:CC:References:From:In-Reply-To; b=XMWxkwQ0jmo691K7riYPdzo3PLTS2eGjFMQIu2d14I6FVIqLU7Kz+fPQN1tGIP5Sb Enhm7s1Oa9cCSFprWvAa+20CQUeuJOy3sVvNRWYgWFVBPFP6rVcDFciafiHzGJUzEb v8Rqo9nCFfN7TbQHA3RcG4UJ+zyFIJ5iRlVGORNo= Received: from DLEE107.ent.ti.com (dlee107.ent.ti.com [157.170.170.37]) by lelvem-sh02.itg.ti.com (8.18.1/8.18.1) with ESMTPS id 578GQZCE1746701 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA256 bits=128 verify=FAIL); Fri, 8 Aug 2025 11:26:35 -0500 Received: from DLEE110.ent.ti.com (157.170.170.21) by DLEE107.ent.ti.com (157.170.170.37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55; Fri, 8 Aug 2025 11:26:34 -0500 Received: from lelvem-mr06.itg.ti.com (10.180.75.8) by DLEE110.ent.ti.com (157.170.170.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55 via Frontend Transport; Fri, 8 Aug 2025 11:26:34 -0500 Received: from [172.24.233.20] (a0512632.dhcp.ti.com [172.24.233.20]) by lelvem-mr06.itg.ti.com (8.18.1/8.18.1) with ESMTP id 578GQRKY3012854; Fri, 8 Aug 2025 11:26:28 -0500 Message-ID: Date: Fri, 8 Aug 2025 21:56:26 +0530 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 4/4] drm/tidss: Fix sampling edge configuration To: devarsh , Louis Chauvet , "Jyri Sarha" , Tomi Valkeinen , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sam Ravnborg , Benoit Parrot , Lee Jones , Nishanth Menon , Vignesh Raghavendra , Tero Kristo CC: , Jyri Sarha , Tomi Valkeinen , , , , , References: <20250730-fix-edge-handling-v1-0-1bdfb3fe7922@bootlin.com> <20250730-fix-edge-handling-v1-4-1bdfb3fe7922@bootlin.com> <71ef3203-e11d-4244-8d2d-8e47e8ba6140@ti.com> Content-Language: en-US From: Swamil Jain In-Reply-To: <71ef3203-e11d-4244-8d2d-8e47e8ba6140@ti.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250808_092704_442508_59D9EB37 X-CRM114-Status: GOOD ( 25.41 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 8/8/25 19:16, devarsh wrote: > Hi Louis, > > Thanks for the patch. > > On 30/07/25 22:32, Louis Chauvet wrote: >> As stated in the AM62x Technical Reference Manual (SPRUIV7B), the data >> sampling edge needs to be configured in two distinct registers: one in the >> TIDSS IP and another in the memory-mapped control register modules. > > I don't think AM62x is thee only one which requires this and on the > contrary not all SoCs require this extra setting. We had been waiting on > confirmations from hardware team and very recently they gave a list of > SoCs which require this, as per that I think we need to limit this to > AM62x and AM62A per current supported SoCs. > > Swamil, > Please confirm on this and share if any additional details required here. > Yeah Devarsh, as you mentioned, this is valid for AM62X, AM62A and AM62P. We would have upstreamed this feature, but there are some corrections in Technical Reference Manual for these SoCs regarding programming CTRL_MMR_DPI_CLK_CTRL register fields, we are in loop with H/W team, waiting for their official confirmation regarding this issue. Thanks Louis for working on this patch, but we should wait for H/W team's confirmation. Regards, Swamil. > Regards > Devarsh > > Since >> the latter is not within the same address range, a phandle to a syscon >> device is used to access the regmap. >> >> Fixes: 32a1795f57ee ("drm/tidss: New driver for TI Keystone platform Display SubSystem") >> Signed-off-by: Louis Chauvet >> >> --- >> >> Cc: stable@vger.kernel.org >> --- >> drivers/gpu/drm/tidss/tidss_dispc.c | 14 ++++++++++++++ >> 1 file changed, 14 insertions(+) >> >> diff --git a/drivers/gpu/drm/tidss/tidss_dispc.c b/drivers/gpu/drm/tidss/tidss_dispc.c >> index c0277fa36425ee1f966dccecf2b69a2d01794899..65ca7629a2e75437023bf58f8a1bddc24db5e3da 100644 >> --- a/drivers/gpu/drm/tidss/tidss_dispc.c >> +++ b/drivers/gpu/drm/tidss/tidss_dispc.c >> @@ -498,6 +498,7 @@ struct dispc_device { >> const struct dispc_features *feat; >> >> struct clk *fclk; >> + struct regmap *clk_ctrl; >> >> bool is_enabled; >> >> @@ -1267,6 +1268,11 @@ void dispc_vp_enable(struct dispc_device *dispc, u32 hw_videoport, >> FLD_VAL(mode->vdisplay - 1, 27, 16)); >> >> VP_REG_FLD_MOD(dispc, hw_videoport, DISPC_VP_CONTROL, 1, 0, 0); >> + >> + if (dispc->clk_ctrl) { >> + regmap_update_bits(dispc->clk_ctrl, 0, 0x100, ipc ? 0x100 : 0x000); >> + regmap_update_bits(dispc->clk_ctrl, 0, 0x200, rf ? 0x200 : 0x000); >> + } >> } >> >> void dispc_vp_disable(struct dispc_device *dispc, u32 hw_videoport) >> @@ -3012,6 +3018,14 @@ int dispc_init(struct tidss_device *tidss) >> >> dispc_init_errata(dispc); >> >> + dispc->clk_ctrl = syscon_regmap_lookup_by_phandle_optional(tidss->dev->of_node, >> + "ti,clk-ctrl"); >> + if (IS_ERR(dispc->clk_ctrl)) { >> + r = dev_err_probe(dispc->dev, PTR_ERR(dispc->clk_ctrl), >> + "DISPC: syscon_regmap_lookup_by_phandle failed.\n"); >> + return r; >> + } >> + >> dispc->fourccs = devm_kcalloc(dev, ARRAY_SIZE(dispc_color_formats), >> sizeof(*dispc->fourccs), GFP_KERNEL); >> if (!dispc->fourccs) >> >