From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6C312C5320E for ; Thu, 22 Aug 2024 12:32:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:In-Reply-To:From:References:CC:To:Subject:MIME-Version:Date: Message-ID:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=sPLbyS2C6ehy1IdauZiMIrT1NM/GszQjugI1x4CaiNU=; b=ucvdyg+fTnx5rCk4p4Zugiu49e z2fSE19w8zdKd16Q1kSELZIogalslo3I4xUvAfOtbmL1jvx9YklgYvujAPoEj+uhKq0vupODmYjOJ Li6Y6ZmopT4FO3POZGhDqSb1+0Lk1V4XyzsLj359giCRcSlK6i/dCZapAd0Zd5ngfqcnwWISZGvqV 51aOfBjbkHWyXrDHNN8dmV9WA9+JN8EPaAU5VN7DTp3dEibsbySZw5o0IzClQvRdH+UT70WSqwDTw jROXIit6qUqazR0MafG03LFxt8ZUIhIvSeW1foJMTaBbXEiQWD7aPVyx43HqSx8+6J0ZkAX2NQWM+ zEIr504g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sh6yg-0000000CmJ6-1AHg; Thu, 22 Aug 2024 12:31:46 +0000 Received: from szxga02-in.huawei.com ([45.249.212.188]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sh6xv-0000000CmBh-0uqn for linux-arm-kernel@lists.infradead.org; Thu, 22 Aug 2024 12:31:02 +0000 Received: from mail.maildlp.com (unknown [172.19.163.48]) by szxga02-in.huawei.com (SkyGuard) with ESMTP id 4WqMv62mDlzhY9B; Thu, 22 Aug 2024 20:28:50 +0800 (CST) Received: from kwepemh500013.china.huawei.com (unknown [7.202.181.146]) by mail.maildlp.com (Postfix) with ESMTPS id 6849C18009B; Thu, 22 Aug 2024 20:30:51 +0800 (CST) Received: from [10.67.109.254] (10.67.109.254) by kwepemh500013.china.huawei.com (7.202.181.146) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.11; Thu, 22 Aug 2024 20:30:50 +0800 Message-ID: Date: Thu, 22 Aug 2024 20:30:49 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.2.0 Subject: Re: [PATCH v3 3/3] arm64: entry: Convert to generic entry Content-Language: en-US To: Kevin Brodsky CC: , , , , , , , , , , , , , , , , References: <20240629085601.470241-1-ruanjinjie@huawei.com> <20240629085601.470241-4-ruanjinjie@huawei.com> <4f79f56a-4019-46eb-91dc-f137b714acb7@arm.com> From: Jinjie Ruan In-Reply-To: <4f79f56a-4019-46eb-91dc-f137b714acb7@arm.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.67.109.254] X-ClientProxiedBy: dggems705-chm.china.huawei.com (10.3.19.182) To kwepemh500013.china.huawei.com (7.202.181.146) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240822_053100_543503_CE83DCC9 X-CRM114-Status: GOOD ( 32.43 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2024/8/20 19:43, Kevin Brodsky wrote: > On 29/06/2024 10:56, Jinjie Ruan wrote: >> Currently, x86, Riscv, Loongarch use the generic entry. Convert arm64 >> to use the generic entry infrastructure from kernel/entry/*. The generic >> entry makes maintainers' work easier and codes more elegant, which also >> removed duplicate 150+ LOC. The changes are below: >> >> - Remove TIF_SYSCALL_* flag, _TIF_WORK_MASK, _TIF_SYSCALL_WORK >> >> - Remove syscall_trace_enter/exit() and use generic one. >> >> - Remove *enter_from/exit_to_kernel_mode(), and wrap with generic >> irqentry_enter/exit(). >> >> - Remove *enter_from/exit_to_user_mode(), and wrap with generic >> irqentry_enter_from/exit_to_user_mode(). >> >> - Remove arm64_enter/exit_nmi() and use generic irqentry_nmi_enter/exit(). >> >> - Remove PREEMPT_DYNAMIC code, as generic entry will do it ok by >> implementing arch_irqentry_exit_need_resched(). > > This is looking good to me overall, moving to using the generic helpers > is a clear improvement. I've tried my best to check that the new Thank you very much for the review, It does make the code more clear. > implementation is functionally equivalent to the old. Ignoring additions > in the generic code (such as additional instrumentation_{begin,end}() > pairs or assertions), this seems to be the case, with one exception. The > MTE operations are done in a slightly different order on entry: > > * mte_disable_tco_entry() was called *after* the generic lockdep/CT > functions in __enter_from_user_mode(). It is now called before those > generic operations - arch_enter_from_user_mode() called at the beginning > of enter_from_user_mode(). The most special for arm64 are these MTE operations, the comment for __enter_from_kernel_mode() and __enter_from_user_mode() said: " Handle IRQ/context state management when entering from user/kernel mode. Before this function is called it is not safe to call regular kernel code " I guess it is the reason why mte_disable_tco_entry() was called *after* the generic lockdep/CT functions, but the first version of commit 38ddf7dafaeaf ("arm64: mte: avoid clearing PSTATE.TCO on entry unless necessary") call it in arch/arm64/kernel/entry.S, so I think the order is not so important. > > * Similarly mte_disable_tco_entry() and mte_check_tfsr_entry() was > called after the generic operations in enter_from_kernel_mode(), and > they are now called after - arch_enter_from_kernel_mode() called at the > beginning of irqentry_enter(). This can be adjusted to be consistent. > > I am not under the impression that these ordering changes are > problematic, but I may be missing something.> >> [...] >> >> -/* >> - * Handle IRQ/context state management when entering from kernel mode. >> - * Before this function is called it is not safe to call regular kernel code, >> - * instrumentable code, or any code which may trigger an exception. >> - * >> - * This is intended to match the logic in irqentry_enter(), handling the kernel >> - * mode transitions only. >> - */ >> -static __always_inline void __enter_from_kernel_mode(struct pt_regs *regs) >> -{ >> - regs->exit_rcu = false; > > exit_rcu in struct pt_regs is unused now that these functions are gone > so it can be removed. It is also consistent with ARM64. > >> [...] >> >> @@ -259,48 +74,6 @@ static void noinstr arm64_exit_el1_dbg(struct pt_regs *regs) > > arm64_{enter,exit}_el1_dbg() have apparently no generic counterparts we > can replace them with, but maybe we could align them with the generic > functions some more? Specifically, I'm thinking about making them > return/take an irqentry_state_t just like irqentry_nmi_{enter,exit}(). > This way we can get rid of struct pt_regs::lockdep_hardirqs, which is > now only used by those functions. > >> lockdep_hardirqs_on(CALLER_ADDR0); >> } >> >> -#ifdef CONFIG_PREEMPT_DYNAMIC >> -DEFINE_STATIC_KEY_TRUE(sk_dynamic_irqentry_exit_cond_resched); > > The key is declared in asm/preempt.h, that declaration should also be > removed. Yes, you are right! commit 1b2d3451ee50 ("arm64: Support PREEMPT_DYNAMIC") mentioned it: "Since arm64 does not yet use the generic entry code, we must define our own `sk_dynamic_irqentry_exit_cond_resched`, which will be enabled/disabled by the common code in kernel/sched/core.c. All other preemption functions and associated static keys are defined there." So if arm64 switched to generic entry, the code can be removed. > > Kevin > >> [...] > >