Re: [PATCH v1 2/4] arm64/mte: Add a little bit of documentation for mte_update_sctlr_user()

[Vincenzo Frascino <vincenzo.frascino@arm.com>]

On 1/27/22 7:57 PM, Mark Brown wrote:
> The code isn't that obscure but it probably won't hurt to have a little
> bit more documentation for anyone trying to find out where everything
> actually takes effect.
> 
> Signed-off-by: Mark Brown <broonie@kernel.org>

Reviewed-by: Vincenzo Frascino <Vincenzo.Frascino@arm.com>

> ---
>  arch/arm64/kernel/mte.c | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
> 
> diff --git a/arch/arm64/kernel/mte.c b/arch/arm64/kernel/mte.c
> index f418ebc65f95..fa4001fee12a 100644
> --- a/arch/arm64/kernel/mte.c
> +++ b/arch/arm64/kernel/mte.c
> @@ -186,6 +186,11 @@ void mte_check_tfsr_el1(void)
>  }
>  #endif
>  
> +/*
> + * This is where we actually resolve the system and process MTE mode
> + * configuration into an actual value in SCTLR_EL1 that affects
> + * userspace.
> + */
>  static void mte_update_sctlr_user(struct task_struct *task)
>  {
>  	/*
> @@ -199,8 +204,17 @@ static void mte_update_sctlr_user(struct task_struct *task)
>  	unsigned long pref, resolved_mte_tcf;
>  
>  	pref = __this_cpu_read(mte_tcf_preferred);
> +	/*
> +	 * If there is no overlap between the system preferred and
> +	 * program requested values go with what was requested.
> +	 */
>  	resolved_mte_tcf = (mte_ctrl & pref) ? pref : mte_ctrl;
>  	sctlr &= ~SCTLR_EL1_TCF0_MASK;
> +	/*
> +	 * Pick an actual setting. The order in which we check for
> +	 * set bits and map into register values determines our
> +	 * default order.
> +	 */
>  	if (resolved_mte_tcf & MTE_CTRL_TCF_ASYNC)
>  		sctlr |= SCTLR_EL1_TCF0_ASYNC;
>  	else if (resolved_mte_tcf & MTE_CTRL_TCF_SYNC)
> 

-- 
Regards,
Vincenzo

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