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Mon, 01 Jun 2020 17:15:10 GMT Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 2EE8BC433CB; Mon, 1 Jun 2020 17:15:10 +0000 (UTC) Received: from mail.codeaurora.org (localhost.localdomain [127.0.0.1]) (using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: saiprakash.ranjan) by smtp.codeaurora.org (Postfix) with ESMTPSA id 55B32C433C9; Mon, 1 Jun 2020 17:15:09 +0000 (UTC) MIME-Version: 1.0 Date: Mon, 01 Jun 2020 22:45:09 +0530 From: Sai Prakash Ranjan To: Mike Leach Subject: Re: [PATCH 2/2] coresight: tmc: Add shutdown callback for TMC ETR/ETF In-Reply-To: References: <28123d1e19f235f97555ee36a5ed8b52d20cbdea.1590947174.git.saiprakash.ranjan@codeaurora.org> Message-ID: X-Sender: saiprakash.ranjan@codeaurora.org User-Agent: Roundcube Webmail/1.3.9 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200601_101511_956549_D14F1ADB X-CRM114-Status: GOOD ( 17.89 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mathieu Poirier , Suzuki K Poulose , linux-arm-msm@vger.kernel.org, Coresight ML , Linux Kernel Mailing List , Stephen Boyd , linux-arm-kernel Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Mike, Thanks for the review. On 2020-06-01 19:05, Mike Leach wrote: > Hi, > > On Mon, 1 Jun 2020 at 09:02, Sai Prakash Ranjan > wrote: >> >> Implement a shutdown callback to ensure ETR/ETF hardware is >> properly shutdown in reboot/shutdown path. This is required >> for ETR/ETF which has SMMU address translation enabled like >> on SC7180 SoC and few others. If the hardware is still accessing >> memory after SMMU translation is disabled as part of SMMU >> shutdown callback in system reboot or shutdown path, then >> IOVAs(I/O virtual address) which it was using will go on the bus >> as the physical addresses which might result in unknown crashes >> (NoC/interconnect errors). So we make sure from this shutdown >> callback that the ETR/ETF is shutdown before SMMU translation is >> disabled and device_link in SMMU driver will take care of ordering >> of shutdown callbacks such that SMMU shutdown callback is not >> called before any of its consumer shutdown callbacks. >> >> Signed-off-by: Sai Prakash Ranjan >> --- >> .../hwtracing/coresight/coresight-tmc-etf.c | 4 +-- >> .../hwtracing/coresight/coresight-tmc-etr.c | 2 +- >> drivers/hwtracing/coresight/coresight-tmc.c | 29 >> +++++++++++++++++++ >> drivers/hwtracing/coresight/coresight-tmc.h | 3 ++ >> 4 files changed, 35 insertions(+), 3 deletions(-) >> >> diff --git a/drivers/hwtracing/coresight/coresight-tmc-etf.c >> b/drivers/hwtracing/coresight/coresight-tmc-etf.c >> index 36cce2bfb744..cba3e7592820 100644 >> --- a/drivers/hwtracing/coresight/coresight-tmc-etf.c >> +++ b/drivers/hwtracing/coresight/coresight-tmc-etf.c >> @@ -85,7 +85,7 @@ static void __tmc_etb_disable_hw(struct tmc_drvdata >> *drvdata) >> CS_LOCK(drvdata->base); >> } >> >> -static void tmc_etb_disable_hw(struct tmc_drvdata *drvdata) >> +void tmc_etb_disable_hw(struct tmc_drvdata *drvdata) >> { >> __tmc_etb_disable_hw(drvdata); >> coresight_disclaim_device(drvdata->base); >> @@ -118,7 +118,7 @@ static int tmc_etf_enable_hw(struct tmc_drvdata >> *drvdata) >> return 0; >> } >> >> -static void tmc_etf_disable_hw(struct tmc_drvdata *drvdata) >> +void tmc_etf_disable_hw(struct tmc_drvdata *drvdata) >> { >> CS_UNLOCK(drvdata->base); >> >> diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c >> b/drivers/hwtracing/coresight/coresight-tmc-etr.c >> index 625882bc8b08..b29c2db94d96 100644 >> --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c >> +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c >> @@ -1110,7 +1110,7 @@ static void __tmc_etr_disable_hw(struct >> tmc_drvdata *drvdata) >> >> } >> >> -static void tmc_etr_disable_hw(struct tmc_drvdata *drvdata) >> +void tmc_etr_disable_hw(struct tmc_drvdata *drvdata) >> { >> __tmc_etr_disable_hw(drvdata); >> /* Disable CATU device if this ETR is connected to one */ >> diff --git a/drivers/hwtracing/coresight/coresight-tmc.c >> b/drivers/hwtracing/coresight/coresight-tmc.c >> index 5a271ebc4585..7e687a356fe0 100644 >> --- a/drivers/hwtracing/coresight/coresight-tmc.c >> +++ b/drivers/hwtracing/coresight/coresight-tmc.c >> @@ -540,6 +540,34 @@ static int tmc_probe(struct amba_device *adev, >> const struct amba_id *id) >> return ret; >> } >> >> +static void tmc_shutdown(struct amba_device *adev) >> +{ >> + struct tmc_drvdata *drvdata = amba_get_drvdata(adev); >> + > > Take drvdata->spinlock here? The tmc_xxx_disable_hw functions are > normally called with the spinlock claimed. > Sure will take spinlock here. >> + if (!drvdata->enable) > > As per previous patch drvdata->mode can be used here. > Yes, will use mode here and drop enable flag in the next version. Thanks, Sai -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel