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From: claudiu beznea <claudiu.beznea@tuxon.dev>
To: Christian Melki <christian.melki@t2data.com>,
	Srinivas Kandagatla <srinivas.kandagatla@linaro.org>,
	"moderated list:MICROCHIP OTPC DRIVER"
	<linux-arm-kernel@lists.infradead.org>,
	open list <linux-kernel@vger.kernel.org>,
	Nicolas Ferre <nicolas.ferre@microchip.com>
Subject: Re: [PATCH v1 07/12] nvmem: microchip-otpc: Add missing register definitions
Date: Sat, 7 Sep 2024 15:05:01 +0300	[thread overview]
Message-ID: <f3e37d0f-fe07-42df-a3cc-948155b76e20@tuxon.dev> (raw)
In-Reply-To: <20240902-countless-applicant-e726bda10200@thorsis.com>



On 02.09.2024 11:08, Alexander Dahl wrote:
> Hello Claudiu,
> 
> Am Sat, Aug 31, 2024 at 06:33:50PM +0300 schrieb claudiu beznea:
>>
>>
>> On 28.08.2024 11:14, Alexander Dahl wrote:
>>> Hello Claudiu,
>>>
>>> Am Sat, Aug 24, 2024 at 06:54:02PM +0300 schrieb claudiu beznea:
>>>>
>>>>
>>>> On 21.08.2024 13:59, Alexander Dahl wrote:
>>>>> According to datasheets DS60001765B for SAMA7G5 and DS60001579G for
>>>>> SAM9X60.
>>>>>
>>>>> Signed-off-by: Alexander Dahl <ada@thorsis.com>
>>>>> ---
>>>>>  drivers/nvmem/microchip-otpc.c | 15 +++++++++++++++
>>>>>  1 file changed, 15 insertions(+)
>>>>>
>>>>> diff --git a/drivers/nvmem/microchip-otpc.c b/drivers/nvmem/microchip-otpc.c
>>>>> index b8ed7412dbca..4630e96243ac 100644
>>>>> --- a/drivers/nvmem/microchip-otpc.c
>>>>> +++ b/drivers/nvmem/microchip-otpc.c
>>>>> @@ -21,9 +21,24 @@
>>>>>  #define MCHP_OTPC_AR			(0x8)
>>>>>  #define MCHP_OTPC_SR			(0xc)
>>>>>  #define MCHP_OTPC_SR_READ		BIT(6)
>>>>> +#define MCHP_OTPC_IER			(0x10)
>>>>> +#define MCHP_OTPC_IDR			(0x14)
>>>>> +#define MCHP_OTPC_IMR			(0x18)
>>>>> +#define MCHP_OTPC_ISR			(0x1C)
>>>>> +#define MCHP_OTPC_ISR_COERR		BIT(13)
>>>>>  #define MCHP_OTPC_HR			(0x20)
>>>>>  #define MCHP_OTPC_HR_SIZE		GENMASK(15, 8)
>>>>>  #define MCHP_OTPC_DR			(0x24)
>>>>> +#define MCHP_OTPC_BAR			(0x30)
>>>>> +#define MCHP_OTPC_CAR			(0x34)
>>>>> +#define MCHP_OTPC_UHC0R			(0x50)
>>>>> +#define MCHP_OTPC_UHC1R			(0x54)
>>>>> +#define MCHP_OTPC_UID0R			(0x60)
>>>>> +#define MCHP_OTPC_UID1R			(0x64)
>>>>> +#define MCHP_OTPC_UID2R			(0x68)
>>>>> +#define MCHP_OTPC_UID3R			(0x6C)
>>>>> +#define MCHP_OTPC_WPMR			(0xE4)
>>>>> +#define MCHP_OTPC_WPSR			(0xE8)
>>>>
>>>> Are all these used in driver?
>>>
>>> Not all, but some.  What are you implying?  Only add register
>>> definitions actually used in the driver? 
>>
>> Yes!
> 
> Okay.
> 
> So if I drop the patch with the warnings on driver probe you did not
> like (checking for pre probe error conditions in interrupt register
> for example), then it is just the MCHP_OTPC_UID0R and I would squash
> that one definition in the last patch adding the nvmem for the UID
> then, okay?

OK for me.

The idea would be to keep just what is used.

Thank you,
Claudiu Beznea

> 
> Greets
> Alex
> 
>>
>>> Why?
>>
>> Less code to maintain. If it's not used there is no meaning to have it.
>>
>>
>>>
>>> Those register offsets won't change, but helped us when debugging.
>>> Debug code (e.g. register dump) is not part of the patch series.
>>>
>>> Greets
>>> Alex
>>>
>>>>
>>>>>  
>>>>>  #define MCHP_OTPC_NAME			"mchp-otpc"
>>>>>  #define MCHP_OTPC_SIZE			(11 * 1024)
>>


  reply	other threads:[~2024-09-07 12:06 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-08-21 10:59 [PATCH v1 00/12] Microchip OTPC driver on SAM9X60 exposing UIDxR as additional nvmem device Alexander Dahl
2024-08-21 10:59 ` [PATCH v1 01/12] nvmem: microchip-otpc: Avoid writing a write-only register Alexander Dahl
2024-08-24 15:51   ` claudiu beznea
2024-08-21 10:59 ` [PATCH v1 02/12] nvmem: microchip-otpc: Fix swapped 'sleep' and 'timeout' parameters Alexander Dahl
2024-08-24 15:52   ` claudiu beznea
2024-08-21 10:59 ` [PATCH v1 03/12] dt-bindings: nvmem: microchip-otpc: Add compatible for SAM9X60 Alexander Dahl
2024-08-21 12:49   ` Rob Herring (Arm)
2024-08-21 14:55   ` Conor Dooley
2024-08-21 10:59 ` [PATCH v1 04/12] nvmem: microchip-otpc: Add SAM9X60 support Alexander Dahl
2024-08-24 15:53   ` claudiu beznea
2024-08-28  8:09     ` Alexander Dahl
2024-08-31 15:31       ` claudiu beznea
2024-08-21 10:59 ` [PATCH v1 06/12] ARM: dts: microchip: sam9x60_curiosity: Enable OTP Controller Alexander Dahl
2024-08-21 10:59 ` [PATCH v1 07/12] nvmem: microchip-otpc: Add missing register definitions Alexander Dahl
2024-08-24 15:54   ` claudiu beznea
2024-08-28  8:14     ` Alexander Dahl
2024-08-31 15:33       ` claudiu beznea
2024-09-02  8:08         ` Alexander Dahl
2024-09-07 12:05           ` claudiu beznea [this message]
2024-08-21 10:59 ` [PATCH v1 08/12] nvmem: microchip-otpc: Add warnings for bad OTPC conditions on probe Alexander Dahl
2024-08-24 15:51   ` claudiu beznea
2024-08-21 10:59 ` [PATCH v1 09/12] clk: at91: sam9x60: Allow enabling main_rc_osc through DT Alexander Dahl
2024-08-21 15:55   ` Conor Dooley
2024-09-19 12:39   ` Alexander Dahl
2024-09-24 15:52     ` Ryan Wanner
2024-09-25 15:24       ` Nicolas Ferre
2024-09-26  7:42       ` claudiu beznea
2024-10-01 15:04         ` Ryan Wanner
2025-02-07 12:41           ` Alexander Dahl
2024-08-21 10:59 ` [PATCH v1 11/12] nvmem: microchip-otpc: Enable main RC oscillator clock Alexander Dahl
2024-08-22 15:57   ` kernel test robot
2024-08-24 15:53   ` claudiu beznea
2024-08-21 10:59 ` [PATCH v1 12/12] nvmem: microchip-otpc: Expose UID registers as 2nd nvmem device Alexander Dahl
2024-08-24 15:50   ` claudiu beznea
2024-08-24 16:17 ` [PATCH v1 00/12] Microchip OTPC driver on SAM9X60 exposing UIDxR as additional " claudiu beznea
2024-08-28  7:31   ` Alexander Dahl
2024-08-31 15:38     ` claudiu beznea

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