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Tue, 20 Aug 2024 19:45:52 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGLvx8xlkUZjlEq0KcUSI9PEcJu6+23cYjpsS4sKgWdxqVJexOjK6LBAMbnz8YDagYUZLFm8A== X-Received: by 2002:a17:903:247:b0:1fb:8cab:ccc9 with SMTP id d9443c01a7336-203681e3d0fmr12417995ad.45.1724208352388; Tue, 20 Aug 2024 19:45:52 -0700 (PDT) Received: from [10.72.116.48] ([43.228.180.230]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-201f037903csm84174065ad.125.2024.08.20.19.45.47 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 20 Aug 2024 19:45:51 -0700 (PDT) Message-ID: Date: Wed, 21 Aug 2024 10:45:45 +0800 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 0/4] Allow userspace to change ID_AA64PFR1_EL1 To: Oliver Upton , Marc Zyngier , kvmarm@lists.linux.dev, Mark Brown Cc: Eric Auger , Sebastian Ott , Cornelia Huck , Catalin Marinas , James Morse , kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org, Paolo Bonzini , Shuah Khan , Suzuki K Poulose , Will Deacon , Zenghui Yu References: <20240723072004.1470688-1-shahuang@redhat.com> From: Shaoqin Huang In-Reply-To: <20240723072004.1470688-1-shahuang@redhat.com> X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Language: en-US Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240820_194558_009466_4D722DC9 X-CRM114-Status: GOOD ( 28.79 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Marc, Oliver, Kindly ping for this series. Welcome your feedbacks. I wonder if this implementation satisfy your expectation? Thanks, Shaoqin On 7/23/24 15:19, Shaoqin Huang wrote: > Hi guys, > > This is another try to allow userspace to change ID_AA64PFR1_EL1, and we want to > give userspace the ability to control the visible feature set for a VM, which > could be used by userspace in such a way to transparently migrate VMs. > > The patch series have four part: > > The first patch disable those fields which KVM doesn't know how to handle, so > KVM will only expose value 0 of those fields to the guest. > > The second patch check the FEAT_SSBS in guest IDREG instead of the cpu > capability. > > The third patch allow userspace to change ID_AA64PFR1_EL1, it only advertise the > fields known to KVM and leave others unadvertise. > > The fourth patch adds the kselftest to test if userspace can change the > ID_AA64PFR1_EL1. > > Besides, I also noticed there is another patch [1] which try to make the > ID_AA64PFR1_EL1 writable. This patch [1] is try to enable GCS on baremental, and > add GCS support for the guest. What I understand is if we have GCS support on > baremental, it will be clear to how to handle them in KVM. And same for other > fields like NMI, THE, DF2, MTEX.. At that time, they can be writable. > > [1] [PATCH v9 13/39] KVM: arm64: Manage GCS registers for guests > https://lore.kernel.org/all/20240625-arm64-gcs-v9-13-0f634469b8f0@kernel.org/ > > Changelog: > ---------- > v4 -> v5: > * Only advertise fields which KVM know how to handle to userspace, leave > others unadvertised. > * Add a new patch to check FEAT_SSBS in IDREG instead of cpu capability. > * Tweak the kselftest writable fields. > * Improve the commit message. > > v3 -> v4: > * Add a new patch to disable some feature which KVM doesn't know how to > handle in the register accessor. > * Handle all the fields in the register. > * Fixes a small cnt issue in kselftest. > > v2 -> v3: > * Give more description about why only part of the fields can be writable. > * Updated the writable mask by referring the latest ARM spec. > > v1 -> v2: > * Tackling the full register instead of single field. > * Changing the patch title and commit message. > > RFCv1 -> v1: > * Fix the compilation error. > * Delete the machine specific information and make the description more > generable. > > RFCv1: https://lore.kernel.org/all/20240612023553.127813-1-shahuang@redhat.com/ > v1: https://lore.kernel.org/all/20240617075131.1006173-1-shahuang@redhat.com/ > v2: https://lore.kernel.org/all/20240618063808.1040085-1-shahuang@redhat.com/ > v3: https://lore.kernel.org/all/20240628060454.1936886-2-shahuang@redhat.com/ > v4: https://lore.kernel.org/all/20240718035017.434996-1-shahuang@redhat.com/ > > Shaoqin Huang (4): > KVM: arm64: Disable fields that KVM doesn't know how to handle in > ID_AA64PFR1_EL1 > KVM: arm64: Use kvm_has_feat() to check if FEAT_SSBS is advertised to > the guest > KVM: arm64: Allow userspace to change ID_AA64PFR1_EL1 > KVM: selftests: aarch64: Add writable test for ID_AA64PFR1_EL1 > > arch/arm64/kvm/hypercalls.c | 12 +++++----- > arch/arm64/kvm/sys_regs.c | 22 ++++++++++++++++++- > .../selftests/kvm/aarch64/set_id_regs.c | 14 +++++++++--- > 3 files changed, 38 insertions(+), 10 deletions(-) > -- Shaoqin