Re: [PATCH 3/5] arm64: dts: freescale: add Ka-Ro Electronics tx8m-1610 COM

[Maud Spierings <maudspierings@gocontroll.com>]

Thanks for the review!

On 10/9/25 16:48, Frank Li wrote:
> On Thu, Oct 09, 2025 at 12:54:19PM +0200, Maud Spierings via B4 Relay wrote:
>> From: Maud Spierings <maudspierings@gocontroll.com>
>>
>> The Ka-Ro Electronics tx8m-1610 is a COM based on the imx8mm SOC. It has
>> 1 GB of ram and 4 GB of eMMC storage on board.
>>
>> Add it to enable boards based on this module
>>
>> Signed-off-by: Maud Spierings <maudspierings@gocontroll.com>
>> ---
>>   .../arm64/boot/dts/freescale/imx8mm-tx8m-1610.dtsi | 562 +++++++++++++++++++++
>>   1 file changed, 562 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-tx8m-1610.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-tx8m-1610.dtsi
>> new file mode 100644
>> index 0000000000000..6ed86b10c4310
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/freescale/imx8mm-tx8m-1610.dtsi
>> @@ -0,0 +1,562 @@
>> +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
>> +/*
>> + * Copyright (C) 2021 Lothar Waßmann <LW@KARO-electronics.de>
>> + * 2025 Maud Spierings <maudspierings@gocontroll.com>
>> + */
>> +
>> +#include "imx8mm.dtsi"
>> +
>> +/ {
>> +	reg_3v3_etn: regulator-3v3-etn {
>> +		compatible = "regulator-fixed";
>> +		enable-active-high;
>> +		gpio = <&gpio1 23 GPIO_ACTIVE_HIGH>;
>> +		pinctrl-0 = <&pinctrl_reg_3v3_etn>;
>> +		pinctrl-names = "default";
>> +		regulator-boot-on;
>> +		regulator-max-microvolt = <3300000>;
>> +		regulator-min-microvolt = <3300000>;
>> +		regulator-name = "3v3-etn";
>> +		vin-supply = <&reg_vdd_3v3>;
>> +	};
>> +};
>> +
>> +&A53_0 {
>> +	cpu-supply = <&reg_vdd_arm>;
>> +};
>> +
>> +&A53_1 {
>> +	cpu-supply = <&reg_vdd_arm>;
>> +};
>> +
>> +&A53_2 {
>> +	cpu-supply = <&reg_vdd_arm>;
>> +};
>> +
>> +&A53_3 {
>> +	cpu-supply = <&reg_vdd_arm>;
>> +};
>> +
>> +&ddrc {
>> +	operating-points-v2 = <&ddrc_opp_table>;
>> +
>> +	ddrc_opp_table: opp-table {
>> +		compatible = "operating-points-v2";
>> +
>> +		opp-400000000 {
>> +			opp-hz = /bits/ 64 <400000000>;
>> +		};
>> +	};
>> +};
>> +
>> +&fec1 {
>> +	assigned-clocks = <&clk IMX8MM_CLK_ENET_AXI>,
>> +	<&clk IMX8MM_CLK_ENET_TIMER>,
>> +	<&clk IMX8MM_CLK_ENET_REF>,
>> +	<&clk IMX8MM_CLK_ENET_REF>;
> 
> Need align to previous line <

oop yeah thats my bad.

>> +	assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_266M>,
>> +	<&clk IMX8MM_SYS_PLL2_100M>,
>> +	<&clk IMX8MM_SYS_PLL2_50M>,
>> +	<&clk IMX8MM_SYS_PLL2_50M>;
>> +	assigned-clock-rates = <0>, <100000000>, <50000000>, <50000000>;
>> +	clocks = <&clk IMX8MM_CLK_ENET1_ROOT>,
>> +		 <&clk IMX8MM_CLK_ENET1_ROOT>,
>> +		 <&clk IMX8MM_CLK_ENET_TIMER>,
>> +		 <&clk IMX8MM_CLK_ENET_REF>;
>> +	phy-handle = <&ethphy0>;
>> +	phy-mode = "rmii";
>> +	phy-supply = <&reg_3v3_etn>;
>> +	pinctrl-0 = <&pinctrl_fec1>;
>> +	pinctrl-names = "default";
>> +	status = "okay";
>> +
>> +	mdio {
>> +		#address-cells = <1>;
>> +		#size-cells = <0>;
>> +		pinctrl-0 = <&pinctrl_ethphy_rst>;
>> +		pinctrl-names = "default";
>> +		reset-delay-us = <25000>;
>> +		reset-gpios = <&gpio1 29 GPIO_ACTIVE_LOW>;
>> +		reset-post-delay-us = <100>;
>> +
>> +		ethphy0: ethernet-phy@0 {
>> +			reg = <0>;
>> +			clocks = <&clk IMX8MM_CLK_ENET_REF>;
>> +			smsc,disable-energy-detect;
>> +		};
>> +	};
>> +};
>> +
>> +&gpio1 {
>> +	gpio-line-names = "SODIMM_152",
>> +			  "SODIMM_42",
>> +			  "SODIMM_153",
>> +			  "PMIC_IRQ_B",
>> +			  "SODIMM_154",
>> +			  "SODIMM_155",
>> +			  "SODIMM_156",
>> +			  "SODIMM_157",
>> +			  "SODIMM_158",
>> +			  "SODIMM_159",
>> +			  "SODIMM_161",
>> +			  "SODIMM_162",
>> +			  "SODIMM_34",
>> +			  "SODIMM_36",
>> +			  "SODIMM_27",
>> +			  "SODIMM_28",
>> +			  "",
>> +			  "",
>> +			  "",
>> +			  "",
>> +			  "",
>> +			  "",
>> +			  "",
>> +			  "ENET_POWER",
>> +			  "",
>> +			  "",
>> +			  "",
>> +			  "",
>> +			  "ENET_nINT",
>> +			  "ENET_nRST",
>> +			  "",
>> +			  "";
> 
> I think
> 	 gpio-line-names = "SODIMM_152", "SODIMM_42", "SODIMM_153", "PMIC_IRQ_B",
> 			   "SODIMM_154", "SODIMM_155", "SODIMM_156", "SODIMM_157",
> 			   ...
> 
> pack 4 lines to one line to help readablity.

I followed the same pattern I used in imx8mp-tx8p-ml81.dtsi, but if you 
want me to change it I will.

Kind regards,
maud