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([2001:8003:e5b0:9f00:dbbc:1945:6e65:ec5]) by smtp.gmail.com with ESMTPSA id z12-20020a170903018c00b001beef2c9bffsm8873509plg.85.2023.09.18.18.23.02 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 18 Sep 2023 18:23:06 -0700 (PDT) Message-ID: Date: Tue, 19 Sep 2023 11:23:00 +1000 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.12.0 Subject: Re: [RFC PATCH v2 28/35] arm64, irqchip/gic-v3, ACPI: Move MADT GICC enabled check into a helper To: James Morse , linux-pm@vger.kernel.org, loongarch@lists.linux.dev, linux-acpi@vger.kernel.org, linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-riscv@lists.infradead.org, kvmarm@lists.linux.dev Cc: x86@kernel.org, Salil Mehta , Russell King , Jean-Philippe Brucker , jianyong.wu@arm.com, justin.he@arm.com References: <20230913163823.7880-1-james.morse@arm.com> <20230913163823.7880-29-james.morse@arm.com> From: Gavin Shan In-Reply-To: <20230913163823.7880-29-james.morse@arm.com> X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230918_182311_662910_CF66CE94 X-CRM114-Status: GOOD ( 26.15 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 9/14/23 02:38, James Morse wrote: > ACPI, irqchip and the architecture code all inspect the MADT > enabled bit for a GICC entry in the MADT. > > The addition of an 'online capable' bit means all these sites need > updating. > > Move the current checks behind a helper to make future updates easier. > > Signed-off-by: James Morse > --- > arch/arm64/kernel/smp.c | 2 +- > drivers/acpi/processor_core.c | 2 +- > drivers/irqchip/irq-gic-v3.c | 10 ++++------ > include/linux/acpi.h | 5 +++++ > 4 files changed, 11 insertions(+), 8 deletions(-) > With Jonathan and Russell's comments addressed: Reviewed-by: Gavin Shan > diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c > index 960b98b43506..8c8f55721786 100644 > --- a/arch/arm64/kernel/smp.c > +++ b/arch/arm64/kernel/smp.c > @@ -520,7 +520,7 @@ acpi_map_gic_cpu_interface(struct acpi_madt_generic_interrupt *processor) > { > u64 hwid = processor->arm_mpidr; > > - if (!(processor->flags & ACPI_MADT_ENABLED)) { > + if (!acpi_gicc_is_usable(processor)) { > pr_debug("skipping disabled CPU entry with 0x%llx MPIDR\n", hwid); > return; > } > diff --git a/drivers/acpi/processor_core.c b/drivers/acpi/processor_core.c > index 7dd6dbaa98c3..b203cfe28550 100644 > --- a/drivers/acpi/processor_core.c > +++ b/drivers/acpi/processor_core.c > @@ -90,7 +90,7 @@ static int map_gicc_mpidr(struct acpi_subtable_header *entry, > struct acpi_madt_generic_interrupt *gicc = > container_of(entry, struct acpi_madt_generic_interrupt, header); > > - if (!(gicc->flags & ACPI_MADT_ENABLED)) > + if (!acpi_gicc_is_usable(gicc)) > return -ENODEV; > > /* device_declaration means Device object in DSDT, in the > diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c > index eedfa8e9f077..72d3cdebdad1 100644 > --- a/drivers/irqchip/irq-gic-v3.c > +++ b/drivers/irqchip/irq-gic-v3.c > @@ -2367,8 +2367,7 @@ gic_acpi_parse_madt_gicc(union acpi_subtable_headers *header, > u32 size = reg == GIC_PIDR2_ARCH_GICv4 ? SZ_64K * 4 : SZ_64K * 2; > void __iomem *redist_base; > > - /* GICC entry which has !ACPI_MADT_ENABLED is not unusable so skip */ > - if (!(gicc->flags & ACPI_MADT_ENABLED)) > + if (!acpi_gicc_is_usable(gicc)) > return 0; > > redist_base = ioremap(gicc->gicr_base_address, size); > @@ -2418,7 +2417,7 @@ static int __init gic_acpi_match_gicc(union acpi_subtable_headers *header, > * If GICC is enabled and has valid gicr base address, then it means > * GICR base is presented via GICC > */ > - if ((gicc->flags & ACPI_MADT_ENABLED) && gicc->gicr_base_address) { > + if (acpi_gicc_is_usable(gicc) && gicc->gicr_base_address) { > acpi_data.enabled_rdists++; > return 0; > } > @@ -2427,7 +2426,7 @@ static int __init gic_acpi_match_gicc(union acpi_subtable_headers *header, > * It's perfectly valid firmware can pass disabled GICC entry, driver > * should not treat as errors, skip the entry instead of probe fail. > */ > - if (!(gicc->flags & ACPI_MADT_ENABLED)) > + if (!acpi_gicc_is_usable(gicc)) > return 0; > > return -ENODEV; > @@ -2486,8 +2485,7 @@ static int __init gic_acpi_parse_virt_madt_gicc(union acpi_subtable_headers *hea > int maint_irq_mode; > static int first_madt = true; > > - /* Skip unusable CPUs */ > - if (!(gicc->flags & ACPI_MADT_ENABLED)) > + if (!acpi_gicc_is_usable(gicc)) > return 0; > > maint_irq_mode = (gicc->flags & ACPI_MADT_VGIC_IRQ_MODE) ? > diff --git a/include/linux/acpi.h b/include/linux/acpi.h > index b7ab85857bb7..e3265a9eafae 100644 > --- a/include/linux/acpi.h > +++ b/include/linux/acpi.h > @@ -256,6 +256,11 @@ acpi_table_parse_cedt(enum acpi_cedt_type id, > int acpi_parse_mcfg (struct acpi_table_header *header); > void acpi_table_print_madt_entry (struct acpi_subtable_header *madt); > > +static inline bool acpi_gicc_is_usable(struct acpi_madt_generic_interrupt *gicc) > +{ > + return (gicc->flags & ACPI_MADT_ENABLED); > +} > + > /* the following numa functions are architecture-dependent */ > void acpi_numa_slit_init (struct acpi_table_slit *slit); > Thanks, Gavin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel