Re: [PATCH v2 10/12] pinctrl: samsung: add exynosautov920 pinctrl

From: Jaewon Kim <jaewon02.kim@samsung.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
	Alim Akhtar <alim.akhtar@samsung.com>,
	Rob Herring <robh+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Tomasz Figa <tomasz.figa@gmail.com>,
	Sylwester Nawrocki <s.nawrocki@samsung.com>,
	Linus Walleij <linus.walleij@linaro.org>,
	Thierry Reding <thierry.reding@gmail.com>,
	Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Jiri Slaby <jirislaby@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org,
	linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org,
	linux-pwm@vger.kernel.org, linux-serial@vger.kernel.org
Subject: Re: [PATCH v2 10/12] pinctrl: samsung: add exynosautov920 pinctrl
Date: Thu, 23 Nov 2023 15:22:45 +0900	[thread overview]
Message-ID: <f49b77f8-a30d-0923-feba-07c8945f334e@samsung.com> (raw)
In-Reply-To: <8d4e3fcb-2e4a-4580-9aa2-5acbed961c3f@linaro.org>

On 23. 11. 21. 22:51, Krzysztof Kozlowski wrote:
> On 18/11/2023 08:43, Jaewon Kim wrote:
>> On 23. 11. 17. 19:48, Krzysztof Kozlowski wrote:
>>> On 17/11/2023 08:36, Jaewon Kim wrote:
>>>>>> The reason why I chose variable name 'combine' is that EINT registers was
>>>>>> separated from gpio control address. However, in exynosautov920 EINT
>>>>>> registers combined with GPx group. So I chose "combine" word.
>>>>> What does it mean "the GPx group"? Combined means the same place, the
>>>>> same register. I could imagine offset is 0x4, what I wrote last time.
>>>>>
>>>>> Is the offset 0x4?
>> If you are asking about the offset of GPIO control register and EINT
>> control register, 0x4 is correct.
>>
>> There is no empty space between the two register.
>>
>>
>> 0x0 CON
>>
>> 0x4 DAT
>>
>> 0x8 PUD
>>
>> 0xc DRV
>>
>> 0x10 CONPDN
>>
>> 0x14 PUDPDN
>>
>> 0x18 EINT_CON
>>
>> 0x1c EINT_FLTCON
>>
>> 0x20 or 0x24 EINT_MASK (The size of FLTCON register depending on the
>> number of gpio)
>>
>> 0x24 or 0x28 EINT_PEND
>>
>>
>>>>>
>>>>>> Is another reasonable word, I will change it.
>>>>> Why you cannot store the offset?
>>>>>
>>>>>> EINT registers related to the entire group(e.g SVC) were at the end of
>>>>>> the GPIO block and are now moved to 0xf000.
>>>>> So not in the same register, not combined?
>>>>>
>>>> Okay,
>>>>
>>>> Instead of the word combine, I will think of a better word in next version.
>>> I want to know answer to:
>>>
>>> "Why you cannot store the offset?"
>>>
>> I did not understand exactly what you said, but if i guess,,
>>
>> you want to get rid of the offs because the value of the offs is always
>> the same?
>>
>> #define EXYNOSV920_PIN_BANK_EINTG(pins, reg, id, offs, mask_offs, pend_offs)
> I meant that it looks possible to store the offset and use it directly,
> instead of storing bool telling that offset is different.

Thanks for your feedback. We can use offset instead of bool.

I will make v3 patch using new variable 'eint_con_offset' instead of 
'combine'.

Thanks

Jaewon Kim

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