From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 309AECF2584 for ; Sat, 12 Oct 2024 21:30:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:In-Reply-To:From:References:Cc:To:Subject:MIME-Version:Date: Message-ID:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=kjJjhYlC+mu3OAkI2/2ADKzs2O0h2eYRqdtxJ+gGeFY=; b=zVYl7u0PgCTN+NA5haEUEvMqT7 OanCxDNuCWCI12yGB4VQAbazljMvgECIIuzi4u8x8rAuquHiVhl2MuFjgyB+YCZvrQ453nJHLW8G8 X3wygo1WWVr3ZRUUUrGyAwxz6aSJjEILktVzN0+GrdLfsujA/AAuFw+JH0989rISmmAs25ftckBd9 EarBCTEFdjcc2KJKQ3b1AKC1XGeyOT0HIaYTjvvJaqgM452Mlp+BnAYZjIZBHAM4raj6JL0EUpqpd m25WtrUQuY3hVHaYDr5k/R07Iy6gVoOG/D1tnXipmflR1+xfyJAPp1DmDfVwSDxeUKxC/KxJlIPlN Xkhpw2EQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1szjgf-00000001s5p-3T3O; Sat, 12 Oct 2024 21:30:09 +0000 Received: from phobos.denx.de ([85.214.62.61]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1szjcj-00000001rky-3mRC for linux-arm-kernel@lists.infradead.org; Sat, 12 Oct 2024 21:26:07 +0000 Received: from [127.0.0.1] (p578adb1c.dip0.t-ipconnect.de [87.138.219.28]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: marex@denx.de) by phobos.denx.de (Postfix) with ESMTPSA id CBE4A88D13; Sat, 12 Oct 2024 23:25:57 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1728768364; bh=kjJjhYlC+mu3OAkI2/2ADKzs2O0h2eYRqdtxJ+gGeFY=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=vU7+Oz9oMGEpa9N+cyeMWHOHG80R8RgAgGKv17iK6wIM+AzYRcXJlFZOp5GFmx6Oq NKB+WiS9tBUplBINSi73b/e/U2DK/mVH1kAghswVQ+R5iMR0Y/5NvRLbBUrglmaF+M BgE3I3CW71KfjaC03RUkACLvYY3CXGSIsXsZcmHWeRTI1wkFRAsbBa8vSkRnx1xq2Z 6Ki+W8+CthJXEXc/P7kDKPS1DRcspPioJyZYoAA80VwI9y5LEZwond/F17ydAZQ2Nv 8Sjy6j2VeR8KvA3nOGxvJMypFqDuaUQhHiHErS9nguOm+GjiVzquW9tXPPzQvBWBsl gVwSJXmwwhDCg== Message-ID: Date: Sat, 12 Oct 2024 22:37:59 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] drm: lcdif: Use adjusted_mode .clock instead of .crtc_clock To: Liu Ying , Isaac Scott , Alexander Stein , dri-devel@lists.freedesktop.org Cc: Daniel Vetter , David Airlie , Fabio Estevam , Lucas Stach , "Lukas F . Hartmann" , Maarten Lankhorst , Maxime Ripard , Pengutronix Kernel Team , Sascha Hauer , Shawn Guo , Stefan Agner , Thomas Zimmermann , imx@lists.linux.dev, kernel@dh-electronics.com, linux-arm-kernel@lists.infradead.org, kieran.bingham@ideasonboard.com References: <20240531202813.277109-1-marex@denx.de> <1897634.CQOukoFCf9@steina-w> <7ae0cd7774f4b3e30cc033a7e543546732dbced0.camel@ideasonboard.com> <64e18ceed5279a9346a6a1141f02ead93383bd1e.camel@ideasonboard.com> <84f505af-1066-4fcf-84b7-28c152c09b89@denx.de> <23d9df90-cb80-4d97-afd6-5c573face4bc@nxp.com> Content-Language: en-US From: Marek Vasut In-Reply-To: <23d9df90-cb80-4d97-afd6-5c573face4bc@nxp.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241012_142606_442476_2627AA8B X-CRM114-Status: GOOD ( 20.41 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 10/11/24 5:10 AM, Liu Ying wrote: Hi, >>>> This Video PLL1 configuration since moved to &media_blk_ctrl {} , but it is still in the imx8mp.dtsi . Therefore, to make your panel work at the correct desired pixel clock frequency instead of some random one inherited from imx8mp.dtsi, add the following to the pollux DT, I believe that will fix the problem and is the correct fix: >>>> >>>> &media_blk_ctrl { >>>>     // 506800000 = 72400000 * 7 (for single-link LVDS, this is enough) >>>>     // there is no need to multiply the clock by * 2 >>>>     assigned-clock-rates = <500000000>, <200000000>, <0>, <0>, <500000000>, <506800000>; >>> >>> This assigns "video_pll1" clock rate to 506.8MHz which is currently not >>> listed in imx_pll1443x_tbl[]. >> >> Since commit b09c68dc57c9 ("clk: imx: pll14xx: Support dynamic rates") the 1443x PLLs can be configured to arbitrary rates which for video PLL is desirable as those should produce accurate clock. > > Ack. > >> >>> Does the below patch[1] fix the regression issue? It explicitly sets >>> the clock frequency of the panel timing to 74.25MHz. >>> >>> [1] https://patchwork.freedesktop.org/patch/616905/?series=139266&rev=1 >> That patch is wrong, there is an existing entry for this panel in panel-simple.c which is correct and precise, please do not add that kind of imprecise duplicate timings into DT. > > At least the patch[1] is legitimate now to override the display > timing of the panel because the override mode is something > panel-simple.c supports. It may be possible to override the mode, but why would this be the desired if the panel-simple.c already contains valid accurate timings for this particular panel ? > And, pixel clock @74.25MHz is not out > of the panel specification since edt_etml1010g3dra_timing > indicates the minimum as 66.3MHz and the maximum as 78.9MHz. The panel-simple.c already contains timings for this panel, which are accurate and follow the panel datasheet. If the goal here is to support approximate panel timings between the currently available three options (min/typ/max) listed in panel-simple, then that is another discussion for another patch. > Furthermore, if "PHYTEC phyBOARD-Pollux i.MX8MP" also supports > something like MIPI DSI to HDMI, then 74.25MHz panel pixel clock > rate is more desirable because the LVDS display and the MIPI DSI > display pipeline with typical 148.5MHz/74.25MHz pixel clock rates > may use one single "video_pll1" clock. I actually do have exactly this use case on one system -- one LVDS panel and one MIPI DSI panel -- the solution is really easy, source the LVDS pixel clock from Video PLL and the DSI clock from e.g. PLL3 . > Anyway, I think it is ok to use the patch[1] or assigning > "video_pll1" clock rate to 506.8MHz in DT(no things like MIPI > DSI to HDMI in existing DT). I believe for the current release, it is better to update the Video PLL clock in this one board DT, because that is minimum impact change isolated to this board and fixes a real issue where the LVDS panel worked within specification only by sheer chance.