From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1D997C433E0 for ; Tue, 2 Feb 2021 22:51:56 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9989C64D90 for ; Tue, 2 Feb 2021 22:51:55 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9989C64D90 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Type: Content-Transfer-Encoding:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:Message-ID:From: References:To:Subject:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=D9dVMrmcNvV4TrMQARqKYJd5Zi/iAtst6x2VFkJIqXM=; b=jEFPsafexUXJImYdWtAT+X6oN 6+AIaCpMZgO7NWTtkK1nR4hpb0Mp5+LS+o/BmX5hOFbcv7astN6jp2N6+j7lKKKF7E6GC7lJzs/Fb Z8EE3yEJxUFWcoJfEBiU8U9cXcoZQ4s5I4FtKbK74/kJimFsvIB7X67+LibEuD2yxMSytJbaQwg41 cSPhQCpPPjUbtJE07QGq3kn0JktWmu/sN0wnrJqq5KRCm4rVX8Fncq1VbMNrgxD0O2uiIIBDOxqa8 M8OoEH4g72ujcwiARyM+Bg6rCyMW1GPlYAmC4euXeckRJ379bXolCYUOcd41nvYBqsNrJSCXvwlZ8 /icp8im/g==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1l74VI-0000Rc-Lk; Tue, 02 Feb 2021 22:50:36 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1l74VE-0000RG-KU for linux-arm-kernel@lists.infradead.org; Tue, 02 Feb 2021 22:50:34 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id ECABCD6E; Tue, 2 Feb 2021 14:50:27 -0800 (PST) Received: from [10.57.35.108] (unknown [10.57.35.108]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 4A2EF3F694; Tue, 2 Feb 2021 14:50:26 -0800 (PST) Subject: Re: [PATCH V3 05/14] coresight: ete: Add support for ETE tracing To: Mathieu Poirier , Anshuman Khandual References: <1611737738-1493-1-git-send-email-anshuman.khandual@arm.com> <1611737738-1493-6-git-send-email-anshuman.khandual@arm.com> <20210202185639.GE1536093@xps15> From: Suzuki K Poulose Message-ID: Date: Tue, 2 Feb 2021 22:50:13 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.7.0 MIME-Version: 1.0 In-Reply-To: <20210202185639.GE1536093@xps15> Content-Language: en-GB X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210202_175033_611204_5F9640B4 X-CRM114-Status: GOOD ( 24.88 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-kernel@vger.kernel.org, coresight@lists.linaro.org, lcherian@marvell.com, linux-arm-kernel@lists.infradead.org, mike.leach@linaro.org Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2/2/21 6:56 PM, Mathieu Poirier wrote: > On Wed, Jan 27, 2021 at 02:25:29PM +0530, Anshuman Khandual wrote: >> From: Suzuki K Poulose >> >> Add ETE as one of the supported device types we support >> with ETM4x driver. The devices are named following the >> existing convention as ete. >> >> ETE mandates that the trace resource status register is programmed >> before the tracing is turned on. For the moment simply write to >> it indicating TraceActive. >> >> Cc: Mathieu Poirier >> Cc: Mike Leach >> Signed-off-by: Suzuki K Poulose >> Signed-off-by: Anshuman Khandual >> --- ... >> @@ -1834,10 +1854,6 @@ static int etm4_probe(struct device *dev, void __iomem *base, u32 etm_pid) >> if (drvdata->cpu < 0) >> return drvdata->cpu; >> >> - desc.name = devm_kasprintf(dev, GFP_KERNEL, "etm%d", drvdata->cpu); >> - if (!desc.name) >> - return -ENOMEM; >> - >> init_arg.drvdata = drvdata; >> init_arg.csa = &desc.access; >> init_arg.pid = etm_pid; >> @@ -1853,6 +1869,20 @@ static int etm4_probe(struct device *dev, void __iomem *base, u32 etm_pid) >> if (!desc.access.io_mem || >> fwnode_property_present(dev_fwnode(dev), "qcom,skip-power-up")) >> drvdata->skip_power_up = true; > > Add a space here... > >> + major = ETM_ARCH_MAJOR_VERSION(drvdata->arch); >> + minor = ETM_ARCH_MINOR_VERSION(drvdata->arch); > > And here too. Othersiwe it makes a big blob in the middle of the function. > >> + if (etm4x_is_ete(drvdata)) { >> + type_name = "ete"; >> + /* ETE v1 has major version == 5. Adjust this for logging.*/ >> + major -= 4; > > I don't have the documentation for the ETE but I would not adjust @major. I > would simply leave it to what the HW gives us since regardless of the name, the > major revision of the IP block is 5. > At the moment only register definitions are public and can be found here : https://developer.arm.com/docs/ddi0601/g/aarch64-system-registers/trcdevarch The ETE is natural extension of the ETM architecture to support future architecture changes and is designed in a way that the same software can driver both ETM and ETE without much changes. >> diff --git a/drivers/hwtracing/coresight/coresight-etm4x.h b/drivers/hwtracing/coresight/coresight-etm4x.h >> index ca24ac5..8b90de5 100644 >> --- a/drivers/hwtracing/coresight/coresight-etm4x.h >> +++ b/drivers/hwtracing/coresight/coresight-etm4x.h >> @@ -128,6 +128,8 @@ >> #define TRCCIDR2 0xFF8 >> #define TRCCIDR3 0xFFC >> >> +#define TRCRSR_TA BIT(12) >> + >> /* >> * System instructions to access ETM registers. >> * See ETMv4.4 spec ARM IHI0064F section 4.3.6 System instructions >> @@ -390,6 +392,9 @@ >> #define ETM_COMMON_SYSREG_LIST_CASES \ >> ETM_COMMON_SYSREG_LIST(NOP, __unused) >> >> +#define ETM4x_ONLY_SYSREG_LIST_CASES \ >> + ETM4x_ONLY_SYSREG_LIST(NOP, __unused) >> + >> #define ETM4x_SYSREG_LIST_CASES \ >> ETM_COMMON_SYSREG_LIST_CASES \ >> ETM4x_ONLY_SYSREG_LIST(NOP, __unused) >> @@ -406,7 +411,6 @@ >> ETE_ONLY_SYSREG_LIST(WRITE, (val)) >> >> #define ETE_ONLY_SYSREG_LIST_CASES \ >> - ETM_COMMON_SYSREG_LIST_CASES \ > > This goes in patch 04. > Sure, will move it. > With the above: > > Reviewed-by: Mathieu Poirier Thanks for the review Suzuki _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel