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Fri, 16 Oct 2020 10:30:48 GMT Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 54D51C433FF; Fri, 16 Oct 2020 10:30:47 +0000 (UTC) Received: from mail.codeaurora.org (localhost.localdomain [127.0.0.1]) (using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: saiprakash.ranjan) by smtp.codeaurora.org (Postfix) with ESMTPSA id C25CFC433CB; Fri, 16 Oct 2020 10:30:46 +0000 (UTC) MIME-Version: 1.0 Date: Fri, 16 Oct 2020 16:00:46 +0530 From: Sai Prakash Ranjan To: Leo Yan Subject: Re: [PATCH] coresight: etm4x: Add config to exclude kernel mode tracing In-Reply-To: <20201016092450.GG4646@leoy-ThinkPad-X240s> References: <20201015124522.1876-1-saiprakash.ranjan@codeaurora.org> <20201015160257.GA1450102@xps15> <20201016072401.GC4646@leoy-ThinkPad-X240s> <20201016092450.GG4646@leoy-ThinkPad-X240s> Message-ID: X-Sender: saiprakash.ranjan@codeaurora.org User-Agent: Roundcube Webmail/1.3.9 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201016_063114_533470_48ABC64C X-CRM114-Status: GOOD ( 22.78 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Denis Nikitin , Mathieu Poirier , Suzuki K Poulose , linux-arm-msm@vger.kernel.org, coresight@lists.linaro.org, linux-kernel@vger.kernel.org, Stephen Boyd , linux-arm-kernel@lists.infradead.org, Mike Leach Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Leo, On 2020-10-16 14:54, Leo Yan wrote: > Hi Sai, > > On Fri, Oct 16, 2020 at 02:10:47PM +0530, Sai Prakash Ranjan wrote: >> Hi Leo, >> >> On 2020-10-16 12:54, Leo Yan wrote: >> > On Thu, Oct 15, 2020 at 11:40:05PM -0700, Denis Nikitin wrote: >> > > Hi Mathieu, >> > > >> > > I think one of the use cases could be VMs. >> > > Is there isolation between EL1 guest kernels which we can control >> > > from perf >> > > in a system wide mode? >> > >> > Sorry for suddenly jumping in. >> > >> > For KVM, I think we need to implement mechanism for saving/restoring >> > CoreSight context for every guest OS, the CPU PMUs has implemented >> > related features [1]. >> > >> > Thanks, >> > Leo >> > >> > [1] >> > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/kvm/pmu.c >> > >> >> What happens to the sysfs mode of tracing? For that we would still >> need a config right to exclude kernel mode tracing completely. > > IIUC, sysfs mode and perf mode both can apply the same approach, the > guest OS runs a thread context for the host, so when a guest OS is > switched in or out, the hypervisor can save/restore the context for > the guest OS; thus every guest OS will have its dedicated context and > trace data ideally. > Thanks for the explanation, so for this usecase then we would have to implement something as you suggested, not sure how hard would that be looking at my KVM knowledge(which at the moment is almost nil) when compared to a kconfig ;) Thanks, Sai -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel