From mboxrd@z Thu Jan 1 00:00:00 1970 From: cov@codeaurora.org (Christopher Covington) Date: Fri, 6 Jan 2017 10:51:53 -0500 Subject: [PATCH v2 4/5] arm64: Use __tlbi_dsb() macros in KVM code In-Reply-To: <20170103155756.GB14183@leverpostej> References: <20161229224335.13531-1-cov@codeaurora.org> <20161229224335.13531-4-cov@codeaurora.org> <20170103155756.GB14183@leverpostej> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 01/03/2017 10:57 AM, Mark Rutland wrote: > On Thu, Dec 29, 2016 at 05:43:34PM -0500, Christopher Covington wrote: >> Refactor the KVM code to use the newly introduced __tlbi_dsb macros, which >> will allow an errata workaround that repeats tlbi dsb sequences to only >> change one location. This is not intended to change the generated assembly >> and comparing before and after vmlinux objdump shows no functional changes. @@ -32,7 +33,7 @@ void __hyp_text __kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa) * whole of Stage-1. Weep... */ ipa >>= 12; - asm volatile("tlbi ipas2e1is, %0" : : "r" (ipa)); + __tlbi_dsb(ipas2e1is, ish, ipa); /* * We have to ensure completion of the invalidation at Stage-2, >> @@ -40,9 +41,7 @@ void __hyp_text __kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa) >> * complete (S1 + S2) walk based on the old Stage-2 mapping if >> * the Stage-1 invalidation happened first. >> */ >> - dsb(ish); > > Looks like this got accidentally removed. AFAICT it is still necessary. Not removed, just hoisted above the comment block to the previous patch hunk. >> - asm volatile("tlbi vmalle1is" : : ); >> - dsb(ish); >> + __tlbi_dsb(vmalle1is, ish); >> isb(); Thanks, Cov -- Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc. Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.