From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A0728C433E0 for ; Wed, 24 Feb 2021 14:33:43 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4C39664E6B for ; Wed, 24 Feb 2021 14:33:43 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 4C39664E6B Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Type: Content-Transfer-Encoding:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:Message-ID:References:In-Reply-To:Subject:To:From: Date:MIME-Version:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=yTeC02Dul2y2hHBEP3jof+10XB9wn17JaTwnpBsaRMo=; b=qXPaHxmy0Yxa0Oqg/jp874ZRq x68PLw/mSoZTF7/NyAvXpK0QlCZB/F7wQ71CH9h2P42IyAfGR28/VMF3AKumCxncboTYig7OalDH2 SYQVC5r6x8c0TtUxbrLfBgmFVR5h6bh5fJNPvaylekBeuBd+63SPzwUzh/YnEG2X6mGXZIXxD2o7I JDk2VQXtmV4u63EFQvgdlHzdfwe1HkAfafrNJs+ScrQduKQIMab30xl/TReBQZvXxt5U67OYs9qPk b5DNIJxX2L0akmGsUa8ISHfr3f2zWgTgl6OPyC6937sFKYmBOCeqlqZfOsyb1/01jbsbkGCPkCROD /+4ZKGPkg==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1lEvD4-0003lo-Ox; Wed, 24 Feb 2021 14:32:14 +0000 Received: from mail.kernel.org ([198.145.29.99]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1lEvD1-0003lD-Sr for linux-arm-kernel@lists.infradead.org; Wed, 24 Feb 2021 14:32:12 +0000 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 307BA64ED6; Wed, 24 Feb 2021 14:32:08 +0000 (UTC) Received: from disco-boy.misterjones.org ([51.254.78.96] helo=www.loen.fr) by disco-boy.misterjones.org with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 (Exim 4.94) (envelope-from ) id 1lEvCv-00FhNi-Tm; Wed, 24 Feb 2021 14:32:06 +0000 MIME-Version: 1.0 Date: Wed, 24 Feb 2021 14:32:05 +0000 From: Marc Zyngier To: Mark Rutland Subject: Re: [PATCH 0/8] arm64: Support FIQ controller registration In-Reply-To: <20210224140656.GG50741@C02TD0UTHF1T.local> References: <20210219113904.41736-1-mark.rutland@arm.com> <87a6s0orm7.wl-maz@kernel.org> <20210224140656.GG50741@C02TD0UTHF1T.local> User-Agent: Roundcube Webmail/1.4.11 Message-ID: X-Sender: maz@kernel.org X-SA-Exim-Connect-IP: 51.254.78.96 X-SA-Exim-Rcpt-To: mark.rutland@arm.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, catalin.marinas@arm.com, james.morse@arm.com, marcan@marcan.st, tglx@linutronix.de, will@kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210224_093212_104236_CC0F942D X-CRM114-Status: GOOD ( 26.00 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: catalin.marinas@arm.com, marcan@marcan.st, linux-kernel@vger.kernel.org, james.morse@arm.com, tglx@linutronix.de, will@kernel.org, linux-arm-kernel@lists.infradead.org Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2021-02-24 14:06, Mark Rutland wrote: > On Fri, Feb 19, 2021 at 06:10:56PM +0000, Marc Zyngier wrote: >> Hi Mark, >> >> On Fri, 19 Feb 2021 11:38:56 +0000, >> Mark Rutland wrote: >> > >> > Hector's M1 support series [1] shows that some platforms have critical >> > interrupts wired to FIQ, and to support these platforms we need to support >> > handling FIQ exceptions. Other contemporary platforms don't use FIQ (since e.g. >> > this is usually routed to EL3), and as we never expect to take an FIQ, we have >> > the FIQ vector cause a panic. >> > >> > Since the use of FIQ is a platform integration detail (which can differ across >> > bare-metal and virtualized environments), we need be able to explicitly opt-in >> > to handling FIQs while retaining the existing behaviour otherwise. This series >> > adds a new set_handle_fiq() hook so that the FIQ controller can do so, and >> > where no controller is registered the default handler will panic(). For >> > consistency the set_handle_irq() code is made to do the same. >> > >> > The first couple of patches are from Marc's irq/drop-generic_irq_multi_handler >> > branch [2] on kernel.org, and clean up CONFIG_GENERIC_IRQ_MULTI_HANDLER usage. >> > The next four patches move arm64 over to a local set_handle_irq() >> > implementation, which is written to share code with a set_handle_fiq() function >> > in the last two patches. The only functional difference here is that if an IRQ >> > is somehow taken prior to set_handle_irq() the default handler will directly >> > panic() rather than the vector branching to NULL. >> > >> > The penultimate patch is cherry-picked from the v2 M1 series, and as per >> > discussion there [3] will need a few additional fixups. I've included it for >> > now as the DAIF.IF alignment is necessary for the FIQ exception handling added >> > in the final patch. >> > >> > The final patch adds the low-level FIQ exception handling and registration >> > mechanism atop the prior rework. >> >> Thanks for putting this together. I have an extra patch on top of this >> series[1] that prevents the kernel from catching fire if a FIQ fires >> whilst running a guest. Nothing urgent, we can queue it at a later >> time. >> >> Thanks, >> >> M. >> >> [1] >> https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git/log/?h=irq/fiq > > IIUC for that "invalid_vect" should be changed to "valid_vect", to > match > the other valid vector entries, but otherwise that looks sane to me. Err, yes. I though I had fixed that, but obviously didn't. > I guess we could take that as a prerequisite ahead of the rest? Sure, that's mostly independent anyway. And it would make more sense for an unexpected FIQ to crash the host at at the point where we handle interrupts rather than in KVM with very little debug information. Thanks, M. -- Jazz is not dead. It just smells funny... _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel