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From: Akhila YS <akhilayalmati@gmail.com>
To: Conor Dooley <conor@kernel.org>
Cc: Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Nicolas Ferre <nicolas.ferre@microchip.com>,
	Claudiu Beznea <claudiu.beznea@tuxon.dev>,
	Alexandre Belloni <alexandre.belloni@bootlin.com>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3 5/5] dt-bindings: arm: atmel,at91rm9200-sdramc: convert to DT schema
Date: Fri, 27 Feb 2026 21:06:15 +0530	[thread overview]
Message-ID: <f6d4dd37-3817-45b1-a642-8a07405f505d@gmail.com> (raw)
In-Reply-To: <20260226-escapade-staff-4f2842222b3e@spud>


On 26-02-2026 23:42, Conor Dooley wrote:
> On Thu, Feb 26, 2026 at 04:13:37PM +0000, Akhila YS wrote:
>> Convert RAMC SDRAM/DDR controller binding to YAML format.
>>
>> Signed-off-by: Akhila YS <akhilayalmati@gmail.com>
>> ---
>>  .../bindings/arm/atmel,at91rm9200-sdramc.yaml      | 67 ++++++++++++++++++++++
>>  .../devicetree/bindings/arm/atmel-sysregs.txt      | 20 -------
>>  2 files changed, 67 insertions(+), 20 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/arm/atmel,at91rm9200-sdramc.yaml b/Documentation/devicetree/bindings/arm/atmel,at91rm9200-sdramc.yaml
>> new file mode 100644
>> index 000000000000..1516fc8e09e1
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/arm/atmel,at91rm9200-sdramc.yaml
>> @@ -0,0 +1,67 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/arm/atmel,at91rm9200-sdramc.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Microchip (Atmel) SDRAM / DDR Controller (RAMC / DDRAMC / UDDRC)
>> +
>> +maintainers:
>> +  - Nicolas Ferre <nicolas.ferre@microchip.com>
>> +  - Claudiu Beznea <claudiu.beznea@tuxon.dev>
>> +
>> +description:
>> +  The SDRAM/DDR Controller (often called RAMC or DDRAMC) in various
>> +  Atmel/Microchip ARM9 and Cortex-A5/A7 SoCs  manages external
>> +  SDRAM / DDR memory. It is typically exposed as a syscon node for
>> +  register access from other drivers (e.g. for initialization or mode
>> +  configuration). No interrupts or clocks are usually required in the
>> +  binding.
>> +
>> +properties:
>> +  compatible:
>> +    oneOf:
>> +      - items:
>> +          - const: atmel,at91rm9200-sdramc
>> +          - const: syscon
>> +      - items:
>> +          - const: microchip,sama7d65-uddrc
>> +          - const: microchip,sama7g5-uddrc
>> +      - items:
>> +          enum:
> Whoops, sorry for not noticing this earlier, but an items list with one
> entry can be reduced to that one entry. For you here that means that
> "- items enum:" becomes "- enum:".


Hi, i changed patch as per your suggestion, but i found some errors
with  dtbs_check, anyway i sent  a v4 patch.

let me know if any  changes required.

-- 
Best Regards,
Akhila.



  reply	other threads:[~2026-02-27 15:36 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-26 16:13 [PATCH v3 0/5] dt-bindings: Microchip/Atmel AT91/SAMA system peripherals: convert to YAML Akhila YS
2026-02-26 16:13 ` [PATCH v3 1/5] dt-bindings: arm: microchip,sama7g5-chipid : convert to DT schema Akhila YS
2026-02-26 16:13 ` [PATCH v3 2/5] dt-bindings: arm: atmel,at91sam9260-pit: " Akhila YS
2026-02-26 16:13 ` [PATCH v3 3/5] dt-bindings: arm: microchip,sam9x60-pit64b : " Akhila YS
2026-02-26 16:13 ` [PATCH v3 4/5] dt-bindings: arm: atmel,at91rm9200-st: " Akhila YS
2026-02-26 16:13 ` [PATCH v3 5/5] dt-bindings: arm: atmel,at91rm9200-sdramc: " Akhila YS
2026-02-26 18:12   ` Conor Dooley
2026-02-27 15:36     ` Akhila YS [this message]
2026-02-26 18:12 ` [PATCH v3 0/5] dt-bindings: Microchip/Atmel AT91/SAMA system peripherals: convert to YAML Conor Dooley

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