From: Shaoqin Huang <shahuang@redhat.com>
To: Mark Brown <broonie@kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>, Marc Zyngier <maz@kernel.org>,
Oliver Upton <oliver.upton@linux.dev>,
James Morse <james.morse@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, kvmarm@lists.linux.dev
Subject: Re: [PATCH v2 6/7] arm64/sysreg: Convert OSDTRTX_EL1 to automatic generation
Date: Tue, 30 May 2023 18:55:33 +0800 [thread overview]
Message-ID: <f910e97e-b3cf-335b-95e7-4037ff0e2b97@redhat.com> (raw)
In-Reply-To: <20230419-arm64-syreg-gen-v2-6-4c6add1f6257@kernel.org>
On 5/24/23 02:37, Mark Brown wrote:
> Convert OSDTRTX_EL1 to automatic generation as per DDI0601 2023-03. No
> functional changes.
>
Reviewed-by: Shaoqin Huang <shahuang@redhat.com>
> Signed-off-by: Mark Brown <broonie@kernel.org>
> ---
> arch/arm64/include/asm/sysreg.h | 1 -
> arch/arm64/tools/sysreg | 5 +++++
> 2 files changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
> index da954a6eba24..d9711f1e47b2 100644
> --- a/arch/arm64/include/asm/sysreg.h
> +++ b/arch/arm64/include/asm/sysreg.h
> @@ -134,7 +134,6 @@
> #define SYS_SVCR_SMSTART_SM_EL0 sys_reg(0, 3, 4, 3, 3)
> #define SYS_SVCR_SMSTOP_SMZA_EL0 sys_reg(0, 3, 4, 6, 3)
>
> -#define SYS_OSDTRTX_EL1 sys_reg(2, 0, 0, 3, 2)
> #define SYS_OSECCR_EL1 sys_reg(2, 0, 0, 6, 2)
> #define SYS_DBGBVRn_EL1(n) sys_reg(2, 0, 0, n, 4)
> #define SYS_DBGBCRn_EL1(n) sys_reg(2, 0, 0, n, 5)
> diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
> index e4653248dcac..e18ae1df41f4 100644
> --- a/arch/arm64/tools/sysreg
> +++ b/arch/arm64/tools/sysreg
> @@ -88,6 +88,11 @@ Res0 5:1
> Field 0 SS
> EndSysreg
>
> +Sysreg OSDTRTX_EL1 2 0 0 3 2
> +Res0 63:32
> +Field 31:0 DTRTX
> +EndSysreg
> +
> Sysreg OSLAR_EL1 2 0 1 0 4
> Res0 63:1
> Field 0 OSLK
>
--
Shaoqin
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next prev parent reply other threads:[~2023-05-30 10:56 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-23 18:36 [PATCH v2 0/7] arm64/sysreg: More conversions to automatic generation Mark Brown
2023-05-23 18:36 ` [PATCH v2 1/7] arm64/sysreg: Convert MDCCINT_EL1 to automatic register generation Mark Brown
2023-05-23 18:37 ` [PATCH v2 2/7] arm64/sysreg: Convert MDSCR_EL1 " Mark Brown
2023-05-25 21:39 ` Oliver Upton
2023-05-23 18:37 ` [PATCH v2 3/7] arm64/sysreg: Standardise naming of bitfield constants in OSL[AS]R_EL1 Mark Brown
2023-05-23 18:37 ` [PATCH v2 4/7] arm64/sysreg: Convert OSLAR_EL1 to automatic generation Mark Brown
2023-05-23 18:37 ` [PATCH v2 5/7] arm64/sysreg: Convert OSDTRRX_EL1 " Mark Brown
2023-05-30 10:55 ` Shaoqin Huang
2023-05-23 18:37 ` [PATCH v2 6/7] arm64/sysreg: Convert OSDTRTX_EL1 " Mark Brown
2023-05-30 10:55 ` Shaoqin Huang [this message]
2023-05-23 18:37 ` [PATCH v2 7/7] arm64/sysreg: Convert OSECCR_EL1 " Mark Brown
2023-05-30 10:55 ` Shaoqin Huang
2023-05-25 21:41 ` [PATCH v2 0/7] arm64/sysreg: More conversions " Oliver Upton
2023-06-06 17:30 ` Catalin Marinas
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