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Mon, 09 Oct 2023 16:25:02 +0200 (MEST) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 3FFAC100063; Mon, 9 Oct 2023 16:25:01 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 2D7F6255514; Mon, 9 Oct 2023 16:25:01 +0200 (CEST) Received: from [10.201.20.120] (10.201.20.120) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Mon, 9 Oct 2023 16:25:00 +0200 Message-ID: Date: Mon, 9 Oct 2023 16:24:59 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.15.1 Subject: Re: [PATCH 3/7] dt-bindings: media: Document STM32MP25 VENC video encoder Content-Language: en-US To: Krzysztof Kozlowski , Ezequiel Garcia , Philipp Zabel , Mauro Carvalho Chehab , Hans Verkuil , , Maxime Coquelin , Alexandre Torgue , , Rob Herring , Krzysztof Kozlowski , Conor Dooley , , , , CC: Andrzej Pietrasiewicz References: <20231004091552.3531659-1-hugues.fruchet@foss.st.com> <20231004091552.3531659-4-hugues.fruchet@foss.st.com> <6bc60e4a-ddf1-4125-ba27-53ab55a553d2@linaro.org> <0de2ae74-2ba1-0e8d-aa7b-77806ac8b252@foss.st.com> <1e2a4d87-5478-4655-993d-7f404d507c82@linaro.org> From: Hugues FRUCHET In-Reply-To: <1e2a4d87-5478-4655-993d-7f404d507c82@linaro.org> X-Originating-IP: [10.201.20.120] X-ClientProxiedBy: SHFCAS1NODE1.st.com (10.75.129.72) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-09_12,2023-10-09_01,2023-05-22_02 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231009_072516_436906_0E224825 X-CRM114-Status: GOOD ( 11.68 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Krzysztof, On 10/9/23 15:56, Krzysztof Kozlowski wrote: > On 09/10/2023 15:49, Hugues FRUCHET wrote: >> Hi Krzysztof, >> >> On 10/5/23 21:45, Krzysztof Kozlowski wrote: >>> On 04/10/2023 11:15, Hugues Fruchet wrote: >>>> Add STM32MP25 VENC video encoder bindings. >>>> >>> >>> I don't understand why this binding is separate from video decoder. >>> Merge them. >> VDEC and VENC are two independent IPs with their own clock, reset, >> interrupt & register set, they have their own access to APB/AXI bus. >> Moreover future chipsets may embed only VENC or VDEC. >> >> Hoping that this clarifies the reason of two different bindings. > > No, it does not. These are no reasons to have independent bindings, > except when having actual impact on the bindings. The bindings look > identical. What are the differences? I'm sorry but I really don't understand your point, these are two different IPs with very different registers in it, so why should I share that in a single binding ? > > Best regards, > Krzysztof > BR, Hugues. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel