From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9DC6BC433E0 for ; Fri, 29 Jan 2021 15:28:38 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4242660C3D for ; Fri, 29 Jan 2021 15:28:38 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 4242660C3D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Type: Content-Transfer-Encoding:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:Message-ID:From: References:To:Subject:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=GUFD0Kts7oLUr6sO4CbHaiGnRAFraqkdIWMSU8hxAw0=; b=rCAq275VJUHHKIGdqG8KUa5bk aaR/VGynjvuHKem/4HKmPt6yHq9sO8K3JvoYwsavgRvtx+tABlk7cIlA0M7XoXUOrBmqi6A6h2cQB 18/TiXBzzCIW3OJnLmIDixmABaKJxI8fr/cn/eX+ACdn72YuKbb3NJ8lQWFxCBa7VCP0Pq/MCWE0X Md2dNQZTWghh+qYQc/32ppxW8MT6T4KKsHnpcF5c9xJZetzCUeIvUJLukUnBANY+THhOlwFfbQ/An TxrtoGDHsERCWvu9S0CxnNy94atYdAC4Oxnrqgz8ri6S0ipx3bCxQi70NVU/FTMCdOhEbhHxmz8Y0 8rjtgRIsQ==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1l5Vg9-0004L1-1x; Fri, 29 Jan 2021 15:27:21 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1l5Vg6-0004KV-Vj for linux-arm-kernel@lists.infradead.org; Fri, 29 Jan 2021 15:27:20 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 04FC113D5; Fri, 29 Jan 2021 07:27:15 -0800 (PST) Received: from [10.57.35.163] (unknown [10.57.35.163]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 7990F3F71B; Fri, 29 Jan 2021 07:27:13 -0800 (PST) Subject: Re: [PATCH v3 3/3] iommu/arm-smmu-v3: Reserving the entire SMMU register space To: Zhen Lei , Will Deacon , Mark Rutland , Joerg Roedel , linux-arm-kernel , iommu , linux-kernel References: <20210127113258.1421-1-thunder.leizhen@huawei.com> <20210127113258.1421-4-thunder.leizhen@huawei.com> From: Robin Murphy Message-ID: Date: Fri, 29 Jan 2021 15:27:11 +0000 User-Agent: Mozilla/5.0 (Windows NT 10.0; rv:78.0) Gecko/20100101 Thunderbird/78.7.0 MIME-Version: 1.0 In-Reply-To: <20210127113258.1421-4-thunder.leizhen@huawei.com> Content-Language: en-GB X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210129_102719_134001_A1CED563 X-CRM114-Status: GOOD ( 25.78 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jean-Philippe Brucker Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2021-01-27 11:32, Zhen Lei wrote: > commit 52f3fab0067d ("iommu/arm-smmu-v3: Don't reserve implementation > defined register space") only reserves the basic SMMU register space. So > the ECMDQ register space is not covered, it should be mapped again. Due > to the size of this ECMDQ resource is not fixed, depending on > SMMU_IDR6.CMDQ_CONTROL_PAGE_LOG2NUMQ. Processing its resource reservation > to avoid resource conflict with PMCG is a bit more complicated. > > Therefore, the resources of the PMCG are not reserved, and the entire SMMU > resources are reserved. This is the opposite of what I suggested. My point was that it will make the most sense to map the ECMDQ pages as a separate request anyway, therefore there is no reason to stop mapping page 0 and page 1 separately either. If we need to expand the page 0 mapping to cover more of page 0 to reach the SMMU_CMDQ_CONTROL_PAGE_* registers, we can do that when we actually add ECMDQ support. Robin. > Suggested-by: Robin Murphy > Signed-off-by: Zhen Lei > --- > drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 24 ++++-------------------- > drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 2 -- > 2 files changed, 4 insertions(+), 22 deletions(-) > > diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > index f04c55a7503c790..fde24403b06a9e3 100644 > --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > @@ -3476,14 +3476,6 @@ static int arm_smmu_set_bus_ops(struct iommu_ops *ops) > return err; > } > > -static void __iomem *arm_smmu_ioremap(struct device *dev, resource_size_t start, > - resource_size_t size) > -{ > - struct resource res = DEFINE_RES_MEM(start, size); > - > - return devm_ioremap_resource(dev, &res); > -} > - > static int arm_smmu_device_probe(struct platform_device *pdev) > { > int irq, ret; > @@ -3519,22 +3511,14 @@ static int arm_smmu_device_probe(struct platform_device *pdev) > } > ioaddr = res->start; > > - /* > - * Don't map the IMPLEMENTATION DEFINED regions, since they may contain > - * the PMCG registers which are reserved by the PMU driver. > - */ > - smmu->base = arm_smmu_ioremap(dev, ioaddr, ARM_SMMU_REG_SZ); > + smmu->base = devm_ioremap_resource(dev, res); > if (IS_ERR(smmu->base)) > return PTR_ERR(smmu->base); > > - if (arm_smmu_resource_size(smmu) > SZ_64K) { > - smmu->page1 = arm_smmu_ioremap(dev, ioaddr + SZ_64K, > - ARM_SMMU_REG_SZ); > - if (IS_ERR(smmu->page1)) > - return PTR_ERR(smmu->page1); > - } else { > + if (arm_smmu_resource_size(smmu) > SZ_64K) > + smmu->page1 = smmu->base + SZ_64K; > + else > smmu->page1 = smmu->base; > - } > > /* Interrupt lines */ > > diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h > index da525f46dab4fc1..63f2b476987d6ae 100644 > --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h > +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h > @@ -152,8 +152,6 @@ > #define ARM_SMMU_PRIQ_IRQ_CFG1 0xd8 > #define ARM_SMMU_PRIQ_IRQ_CFG2 0xdc > > -#define ARM_SMMU_REG_SZ 0xe00 > - > /* Common MSI config fields */ > #define MSI_CFG0_ADDR_MASK GENMASK_ULL(51, 2) > #define MSI_CFG2_SH GENMASK(5, 4) > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel