Re: [PATCH 2/6] dt-bindings: power: mediatek: Add new MT8189 power

[Krzysztof Kozlowski <krzk@kernel.org>]

On 18/08/2025 13:57, irving.ch.lin wrote:
> From: Irving-ch Lin <irving-ch.lin@mediatek.com>
> 
> Add the new binding documentation for power controller
> on MediaTek MT8189.
> 
> Signed-off-by: Irving-ch Lin <irving-ch.lin@mediatek.com>
> ---
>  .../mediatek,mt8189-power-controller.yaml     | 94 +++++++++++++++++++
>  1 file changed, 94 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/power/mediatek,mt8189-power-controller.yaml
> 
> diff --git a/Documentation/devicetree/bindings/power/mediatek,mt8189-power-controller.yaml b/Documentation/devicetree/bindings/power/mediatek,mt8189-power-controller.yaml
> new file mode 100644
> index 000000000000..1bf8f94858c8
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/power/mediatek,mt8189-power-controller.yaml
> @@ -0,0 +1,94 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/power/mediatek,mt8189-power-controller.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: MediaTek Power Domains Controller for MT8189
> +
> +maintainers:
> +  - Qiqi Wang <qiqi.wang@mediatek.com>
> +
> +description: |
> +  MediaTek processors include support for multiple power domains which can be
> +  powered up/down by software based on different application scenes to save power.
> +
> +  IP cores belonging to a power domain should contain a 'power-domains'
> +  property that is a phandle for SCPSYS node representing the domain.
> +
> +properties:
> +  $nodename:
> +    pattern: '^power-controller(@[0-9a-f]+)?$'

Drop. Reg is not optional.

> +
> +  compatible:
> +    enum:
> +      - mediatek,mt8189-scpsys
> +

reg goes here.

> +  '#power-domain-cells':
> +    const: 1
> +
> +  reg:
> +    description: physical base address and size of the power-controller's register area.

No. Don't use AI tools... Look how this is written based on other bindings.

> +
> +  infra-infracfg-ao-reg-bus:

Follow established practice... You do not get common properties.

> +    $ref: /schemas/types.yaml#/definitions/phandle
> +    description: phandle to the device containing the infracfg register range.

Also do not say what is obvious from property name, but explain the purpose.


> +
> +  emicfg-ao-mem:
> +    $ref: /schemas/types.yaml#/definitions/phandle
> +    description: phandle to the device containing the emicfg register range.
> +
> +  vlpcfg-reg-bus:
> +    $ref: /schemas/types.yaml#/definitions/phandle
> +    description: phandle to the device containing the vlpcfg (very low power config) register range.
> +
> +  clocks:
> +    description: |
> +      A number of phandles to clocks that need to be enabled during domain
> +      power-up sequencing.
> +
> +  clock-names:
> +    description: |
> +      List of names of clocks, in order to match the power-up sequencing
> +      for each power domain we need to group the clocks by name. BASIC
> +      clocks need to be enabled before enabling the corresponding power
> +      domain, and should not have a '-' in their name (i.e mm, mfg, venc).
> +      SUSBYS clocks need to be enabled before releasing the bus protection,
> +      and should contain a '-' in their name (i.e mm-0, isp-0, cam-0).
> +
> +      In order to follow properly the power-up sequencing, the clocks must
> +      be specified by order, adding first the BASIC clocks followed by the
> +      SUSBSYS clocks.
> +
> +  domain-supply:
> +    description: domain regulator supply.
> +
> +required:
> +  - compatible
> +  - reg
Incomplete. Devices cannot work without power and many other things.

Sorry, but this binding is very poor and I feel like you did not put
enough of effort to write correct one. You are not independent
contributor, but do it as part of Mediatek, so I do not understand why
in Mediatek you cannot do basic in-house review.


Best regards,
Krzysztof