From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 34CDDC433FE for ; Mon, 21 Nov 2022 06:37:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:From:References:Cc:To: Subject:MIME-Version:Date:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=jVFeb9CyD5aImpdGHqRieHJHm1mneJ7qRCaHAzqUwOc=; b=kr7YYywvmbz+fG dAKU1NzaVudLj6VAS6DbAgjBs402VPKUIzrW8oWlGlHUpN4SbkgvkzsKPXioGI07s9PWc3x7ZaaWU aZjWb/FErTP9XhdipJFRihAfKE/O1CghRCI4IHh/lRWGQw4Pk8KcDNcQVnjXXLMJ1PnCEcqL9VnKj QFlGlLC2nTfb94kVrnVbnb/XAswdPuxdKdEp8+sp9J0eqIgO6ut3zBo4z6RPL25l7HwPhcRGzvnpB Jt7eRi65ZNIZbDXfOZxrtqZ/IRsPZwNcUlc2OZyaZU7zgCdlgiG33gT99vv/HS8TSEGlhd7VwlST0 f3uLyr5BC73siZ0MGv2A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1ox0QB-009s57-Ty; Mon, 21 Nov 2022 06:36:48 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1ox0Q7-009s2I-Dy for linux-arm-kernel@lists.infradead.org; Mon, 21 Nov 2022 06:36:45 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 908231FB; Sun, 20 Nov 2022 22:36:45 -0800 (PST) Received: from [10.162.41.8] (unknown [10.162.41.8]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 9653B3F73D; Sun, 20 Nov 2022 22:36:34 -0800 (PST) Message-ID: Date: Mon, 21 Nov 2022 12:06:31 +0530 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.2.2 Subject: Re: [PATCH V5 4/7] driver/perf/arm_pmu_platform: Add support for BRBE attributes detection Content-Language: en-US To: Mark Rutland Cc: linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-arm-kernel@lists.infradead.org, peterz@infradead.org, acme@kernel.org, will@kernel.org, catalin.marinas@arm.com, Mark Brown , James Clark , Rob Herring , Marc Zyngier , Suzuki Poulose , Ingo Molnar References: <20221107062514.2851047-1-anshuman.khandual@arm.com> <20221107062514.2851047-5-anshuman.khandual@arm.com> From: Anshuman Khandual In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221120_223643_602380_784C7575 X-CRM114-Status: GOOD ( 24.64 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 11/18/22 23:31, Mark Rutland wrote: > On Mon, Nov 07, 2022 at 11:55:11AM +0530, Anshuman Khandual wrote: >> This adds arm pmu infrastrure to probe BRBE implementation's attributes via >> driver exported callbacks later. The actual BRBE feature detection will be >> added by the driver itself. >> >> CPU specific BRBE entries, cycle count, format support gets detected during >> PMU init. This information gets saved in per-cpu struct pmu_hw_events which >> later helps in operating BRBE during a perf event context. > > Do we expect this to vary between CPUs handled by the same struct arm_pmu ? BRBE registers are per CPU, and the spec does not assert about BRBE properties being the same across the system, served via same the struct arm_pmu. Hence it would be inaccurate to make that assumption, which might have just avoided all these IPI based probes during boot. > >> Cc: Will Deacon >> Cc: Mark Rutland >> Cc: linux-arm-kernel@lists.infradead.org >> Cc: linux-kernel@vger.kernel.org >> Signed-off-by: Anshuman Khandual >> --- >> drivers/perf/arm_pmu_platform.c | 34 +++++++++++++++++++++++++++++++++ >> 1 file changed, 34 insertions(+) >> >> diff --git a/drivers/perf/arm_pmu_platform.c b/drivers/perf/arm_pmu_platform.c >> index 933b96e243b8..acdc445081aa 100644 >> --- a/drivers/perf/arm_pmu_platform.c >> +++ b/drivers/perf/arm_pmu_platform.c >> @@ -172,6 +172,36 @@ static int armpmu_request_irqs(struct arm_pmu *armpmu) >> return err; >> } >> >> +static void arm_brbe_probe_cpu(void *info) >> +{ >> + struct pmu_hw_events *hw_events; >> + struct arm_pmu *armpmu = info; >> + >> + /* >> + * Return from here, if BRBE driver has not been >> + * implemented for this PMU. This helps prevent >> + * kernel crash later when brbe_probe() will be >> + * called on the PMU. >> + */ >> + if (!armpmu->brbe_probe) >> + return; > > Since this is a field on struct arm_pmu, why doesn't armpmu_request_brbe() > check this before calling smp_call_function_single(), to avoid the redundant > IPI? Makes sense, I will move the check inside armpmu_request_brbe() with return code -ENODEV when not available. > >> + >> + hw_events = per_cpu_ptr(armpmu->hw_events, smp_processor_id()); >> + armpmu->brbe_probe(hw_events); >> +} >> + >> +static int armpmu_request_brbe(struct arm_pmu *armpmu) >> +{ >> + int cpu, err = 0; >> + >> + for_each_cpu(cpu, &armpmu->supported_cpus) { >> + err = smp_call_function_single(cpu, arm_brbe_probe_cpu, armpmu, 1); > > Why does this need to be called on each CPU in the supported_cpus mask? Is not supported_cpus derived after partitioning the IRQ in pmu_parse_percpu_irq(). The idea is to fill up BRBE buffer attributes, on all such supported cpus which could trigger PMU interrupt. Is the concern, that not all cpus in supported_cpus mask might not be online during boot, hence IPIs could not be served, hence BRBE attributed for them could not be fetched ? > > I don't see anything here to handle late hotplug, so this looks suspicious. Right, I should add cpu hotplug handling, otherwise risk loosing BRBE support on cpus which might have been offline during boot i.e when above IPI based probe happened ? > Either we're missing something, or it's redundant at boot time. Should we add cpu hotplug online-offline handlers like some other PMU drivers ? Let me know if there are some other concerns. cpuhp_setup_state_multi(CPUHP_AP_ONLINE_DYN, DRVNAME, arm_brbe_cpu_startup, arm_brbe_cpu_teardown) _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel