From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
To: Krzysztof Kozlowski <krzk@kernel.org>,
Geert Uytterhoeven <geert@linux-m68k.org>
Cc: mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org,
alexandre.belloni@bootlin.com, magnus.damm@gmail.com,
p.zabel@pengutronix.de, linux-renesas-soc@vger.kernel.org,
linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-rtc@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Subject: Re: [PATCH v5 03/10] clk: renesas: clk-vbattb: Add VBATTB clock driver
Date: Fri, 1 Nov 2024 10:53:12 +0200 [thread overview]
Message-ID: <fa63898a-33f2-44ad-88ae-bd125e48b71e@tuxon.dev> (raw)
In-Reply-To: <bcc49824-b350-45d0-af84-8458a28d5eef@kernel.org>
On 31.10.2024 11:46, Krzysztof Kozlowski wrote:
> On 31/10/2024 10:26, Claudiu Beznea wrote:
>> Hi, Geert, Krzysztof,
>>
>> On 31.10.2024 10:43, Geert Uytterhoeven wrote:
>>> Hi Krzysztof,
>>>
>>> On Thu, Oct 31, 2024 at 8:48 AM Krzysztof Kozlowski <krzk@kernel.org> wrote:
>>>> On Wed, Oct 30, 2024 at 01:01:13PM +0200, Claudiu wrote:
>>>>> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
>>>>>
>>>>> The VBATTB IP of the Renesas RZ/G3S SoC controls the clock that is used
>>>>> by the RTC. The input to the VBATTB could be a 32KHz crystal
>>>>> or an external clock device.
>>>>>
>>>>> The HW block diagram for the clock generator is as follows:
>>>>>
>>>>> +----------+ XC `\
>>>>> RTXIN --->| |----->| \ +----+ VBATTCLK
>>>>> | 32K clock| | |----->|gate|----------->
>>>>> | osc | XBYP | | +----+
>>>>> RTXOUT --->| |----->| /
>>>>> +----------+ ,
>>>>>
>>>>> After discussions w/ Stephen Boyd the clock tree associated with this
>>>>> hardware block was exported in Linux as:
>>>>>
>>>>> vbattb-xtal
>>>>> xbyp
>>>>> xc
>>>>> mux
>>>>> vbattbclk
>>>>>
>>>>> where:
>>>>> - input-xtal is the input clock (connected to RTXIN, RTXOUT pins)
>>>>> - xc, xbyp are mux inputs
>>>>> - mux is the internal mux
>>>>> - vbattclk is the gate clock that feeds in the end the RTC
>>>>>
>>>>> to allow selecting the input of the MUX though assigned-clock DT
>>>>> properties, using the already existing clock drivers and avoid adding
>>>>> other DT properties. If the crystal is connected on RTXIN,
>>>>> RTXOUT pins the XC will be selected as mux input. If an external clock
>>>>> device is connected on RTXIN, RTXOUT pins the XBYP will be selected as
>>>>> mux input.
>>>>>
>>>>> The load capacitance of the internal crystal can be configured
>>>>> with renesas,vbattb-load-nanofarads DT property.
>>>>>
>>>>> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
>>>>> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
>>>
>>>>> --- a/drivers/clk/renesas/Kconfig
>>>>> +++ b/drivers/clk/renesas/Kconfig
>>>>> @@ -237,6 +237,10 @@ config CLK_RZV2H
>>>>> bool "RZ/V2H(P) family clock support" if COMPILE_TEST
>>>>> select RESET_CONTROLLER
>>>>>
>>>>> +config CLK_RENESAS_VBATTB
>>>>> + bool "Renesas VBATTB clock controller"
>>>>
>>>> tristate
>>>
>>> Good point.
>>> However, does it work as a module, or would that break the RTC?
>>
>> On RZ/G3S the RTC counter needs the clock provided by VBATTB.
>>
>> I'll try with this as a module.
>
> So it will defer, why would this be a problem? This does not look like
No problems with it. I wrongly phrased it. That being said, I'll set
CLK_RENESAS_VBATTB as module along with RTC and do the proper adjustments
in drivers/clk/renesas/Kconfig.
Thank you,
Claudiu
> critical core component, which would halt the system probe (and even
> then systems like Android put everything as modules).
>
> Best regards,
> Krzysztof
>
next prev parent reply other threads:[~2024-11-01 8:55 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-30 11:01 [PATCH v5 00/10] Add RTC support for the Renesas RZ/G3S SoC Claudiu
2024-10-30 11:01 ` [PATCH v5 01/10] dt-bindings: clock: renesas,r9a08g045-vbattb: Document VBATTB Claudiu
2024-10-31 7:46 ` Krzysztof Kozlowski
2024-10-30 11:01 ` [PATCH v5 02/10] clk: linux/clk-provider.h: Add devm_clk_hw_register_gate_parent_hw() Claudiu
2024-10-30 19:47 ` Stephen Boyd
2024-10-30 11:01 ` [PATCH v5 03/10] clk: renesas: clk-vbattb: Add VBATTB clock driver Claudiu
2024-10-31 7:48 ` Krzysztof Kozlowski
2024-10-31 8:43 ` Geert Uytterhoeven
2024-10-31 9:26 ` Claudiu Beznea
2024-10-31 9:46 ` Krzysztof Kozlowski
2024-11-01 8:53 ` Claudiu Beznea [this message]
2024-10-30 11:01 ` [PATCH v5 04/10] dt-bindings: rtc: renesas,rzg3s-rtc: Document the Renesas RTCA-3 IP Claudiu
2024-10-30 15:43 ` Geert Uytterhoeven
2024-10-30 11:01 ` [PATCH v5 05/10] rtc: renesas-rtca3: Add driver for RTCA-3 available on Renesas RZ/G3S SoC Claudiu
2024-10-30 11:01 ` [PATCH v5 06/10] arm64: dts: renesas: r9a08g045: Add VBATTB node Claudiu
2024-10-30 11:01 ` [PATCH v5 07/10] arm64: dts: renesas: r9a08g045: Add RTC node Claudiu
2024-10-30 11:01 ` [PATCH v5 08/10] arm64: dts: renesas: rzg3s-smarc-som: Enable VBATTB Claudiu
2024-10-30 11:01 ` [PATCH v5 09/10] arm64: dts: renesas: rzg3s-smarc-som: Enable RTC Claudiu
2024-10-30 11:01 ` [PATCH v5 10/10] arm64: defconfig: Enable VBATTB clock and Renesas RTCA-3 flags Claudiu
2024-10-31 7:47 ` Krzysztof Kozlowski
2024-10-30 15:50 ` [PATCH v5 00/10] Add RTC support for the Renesas RZ/G3S SoC Geert Uytterhoeven
2024-10-30 18:56 ` Alexandre Belloni
2024-10-31 23:17 ` (subset) " Alexandre Belloni
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