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Tue, 13 Jul 2021 18:47:48 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 56DD610002A; Tue, 13 Jul 2021 18:47:45 +0200 (CEST) Received: from Webmail-eu.st.com (sfhdag2node3.st.com [10.75.127.6]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 3E89F248ED3; Tue, 13 Jul 2021 18:47:45 +0200 (CEST) Received: from lmecxl0993.lme.st.com (10.75.127.44) by SFHDAG2NODE3.st.com (10.75.127.6) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 13 Jul 2021 18:47:44 +0200 Subject: Re: [PATCH] drm/stm: dsi: compute the transition time from LP to HS and back To: Antonio Borneo , Yannick Fertre , Benjamin Gaignard , David Airlie , Daniel Vetter , Maxime Coquelin , Alexandre Torgue , Raphael Gallais-Pou , , , CC: References: <20210713144941.3599-1-antonio.borneo@foss.st.com> From: Philippe CORNU Message-ID: Date: Tue, 13 Jul 2021 18:47:44 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0 MIME-Version: 1.0 In-Reply-To: <20210713144941.3599-1-antonio.borneo@foss.st.com> Content-Language: en-US X-Originating-IP: [10.75.127.44] X-ClientProxiedBy: SFHDAG1NODE3.st.com (10.75.127.3) To SFHDAG2NODE3.st.com (10.75.127.6) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790 definitions=2021-07-13_10:2021-07-13, 2021-07-13 signatures=0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210713_094759_677404_C40089CA X-CRM114-Status: GOOD ( 24.80 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Antonio, On 7/13/21 4:49 PM, Antonio Borneo wrote: > The driver uses a conservative set of hardcoded values for the > maximum time delay of the transitions between LP and HS, either > for data and clock lanes. > > By using the info in STM32MP157 datasheet, valid also for other ST > devices, compute the actual delay from the lane's bps. > > Signed-off-by: Antonio Borneo > --- > To: Yannick Fertre > To: Philippe Cornu > To: Benjamin Gaignard > To: David Airlie > To: Daniel Vetter > To: Maxime Coquelin > To: Alexandre Torgue > To: Raphael Gallais-Pou > To: dri-devel@lists.freedesktop.org > To: linux-stm32@st-md-mailman.stormreply.com > To: linux-arm-kernel@lists.infradead.org > Cc: linux-kernel@vger.kernel.org > > drivers/gpu/drm/stm/dw_mipi_dsi-stm.c | 17 +++++++++++++---- > 1 file changed, 13 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c b/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c > index 8399d337589d..32cb41b2202f 100644 > --- a/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c > +++ b/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c > @@ -309,14 +309,23 @@ dw_mipi_dsi_get_lane_mbps(void *priv_data, const struct drm_display_mode *mode, > return 0; > } > > +#define DSI_PHY_DELAY(fp, vp, mbps) DIV_ROUND_UP((fp) * (mbps) + 1000 * (vp), 8000) > + > static int > dw_mipi_dsi_phy_get_timing(void *priv_data, unsigned int lane_mbps, > struct dw_mipi_dsi_dphy_timing *timing) > { > - timing->clk_hs2lp = 0x40; > - timing->clk_lp2hs = 0x40; > - timing->data_hs2lp = 0x40; > - timing->data_lp2hs = 0x40; > + /* > + * From STM32MP157 datasheet, valid for STM32F469, STM32F7x9, STM32H747 > + * phy_clkhs2lp_time = (272+136*UI)/(8*UI) > + * phy_clklp2hs_time = (512+40*UI)/(8*UI) > + * phy_hs2lp_time = (192+64*UI)/(8*UI) > + * phy_lp2hs_time = (256+32*UI)/(8*UI) > + */ > + timing->clk_hs2lp = DSI_PHY_DELAY(272, 136, lane_mbps); > + timing->clk_lp2hs = DSI_PHY_DELAY(512, 40, lane_mbps); > + timing->data_hs2lp = DSI_PHY_DELAY(192, 64, lane_mbps); > + timing->data_lp2hs = DSI_PHY_DELAY(256, 32, lane_mbps); Many thanks for your patch. Reviewed-by: Philippe Cornu Acked-by: Philippe Cornu I will apply it on drm-misc-next early next week, Philippe :-) > > return 0; > } > > base-commit: 35d283658a6196b2057be562096610c6793e1219 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel