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From: Adrian Hunter <adrian.hunter@intel.com>
To: Kamal Dasu <kdasu.kdev@gmail.com>,
	ulf.hansson@linaro.org, robh+dt@kernel.org, krzk+dt@kernel.org,
	alcooperx@gmail.com
Cc: f.fainelli@gmail.com, bcm-kernel-feedback-list@broadcom.com,
	linux-mmc@vger.kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 2/5] mmc: sdhci-brcmstb: Re-organize flags
Date: Wed, 27 Apr 2022 09:43:53 +0300	[thread overview]
Message-ID: <fcd49d21-7176-4940-e988-a4815ae013f3@intel.com> (raw)
In-Reply-To: <20220421182803.6495-3-kdasu.kdev@gmail.com>

On 21/04/22 21:28, Kamal Dasu wrote:
> From: Al Cooper <alcooperx@gmail.com>
> 
> Re-organize the flags by basing the bit names on the flag that they
> apply to. Also change the "flags" member in the "brcmstb_match_priv"
> struct to const.
> 
> Signed-off-by: Al Cooper <alcooperx@gmail.com>
> Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>

Acked-by: Adrian Hunter <adrian.hunter@intel.com>

> ---
>  drivers/mmc/host/sdhci-brcmstb.c | 32 ++++++++++++++++----------------
>  1 file changed, 16 insertions(+), 16 deletions(-)
> 
> diff --git a/drivers/mmc/host/sdhci-brcmstb.c b/drivers/mmc/host/sdhci-brcmstb.c
> index 11037cd14cfa..f32aa045c26d 100644
> --- a/drivers/mmc/host/sdhci-brcmstb.c
> +++ b/drivers/mmc/host/sdhci-brcmstb.c
> @@ -18,20 +18,22 @@
>  #define SDHCI_VENDOR 0x78
>  #define  SDHCI_VENDOR_ENHANCED_STRB 0x1
>  
> -#define BRCMSTB_PRIV_FLAGS_NO_64BIT		BIT(0)
> -#define BRCMSTB_PRIV_FLAGS_BROKEN_TIMEOUT	BIT(1)
> +#define BRCMSTB_MATCH_FLAGS_NO_64BIT		BIT(0)
> +#define BRCMSTB_MATCH_FLAGS_BROKEN_TIMEOUT	BIT(1)
> +
> +#define BRCMSTB_PRIV_FLAGS_HAS_CQE		BIT(0)
>  
>  #define SDHCI_ARASAN_CQE_BASE_ADDR		0x200
>  
>  struct sdhci_brcmstb_priv {
>  	void __iomem *cfg_regs;
> -	bool has_cqe;
> +	unsigned int flags;
>  };
>  
>  struct brcmstb_match_priv {
>  	void (*hs400es)(struct mmc_host *mmc, struct mmc_ios *ios);
>  	struct sdhci_ops *ops;
> -	unsigned int flags;
> +	const unsigned int flags;
>  };
>  
>  static void sdhci_brcmstb_hs400es(struct mmc_host *mmc, struct mmc_ios *ios)
> @@ -134,13 +136,13 @@ static struct sdhci_ops sdhci_brcmstb_ops_7216 = {
>  };
>  
>  static struct brcmstb_match_priv match_priv_7425 = {
> -	.flags = BRCMSTB_PRIV_FLAGS_NO_64BIT |
> -	BRCMSTB_PRIV_FLAGS_BROKEN_TIMEOUT,
> +	.flags = BRCMSTB_MATCH_FLAGS_NO_64BIT |
> +	BRCMSTB_MATCH_FLAGS_BROKEN_TIMEOUT,
>  	.ops = &sdhci_brcmstb_ops,
>  };
>  
>  static struct brcmstb_match_priv match_priv_7445 = {
> -	.flags = BRCMSTB_PRIV_FLAGS_BROKEN_TIMEOUT,
> +	.flags = BRCMSTB_MATCH_FLAGS_BROKEN_TIMEOUT,
>  	.ops = &sdhci_brcmstb_ops,
>  };
>  
> @@ -176,7 +178,7 @@ static int sdhci_brcmstb_add_host(struct sdhci_host *host,
>  	bool dma64;
>  	int ret;
>  
> -	if (!priv->has_cqe)
> +	if ((priv->flags & BRCMSTB_PRIV_FLAGS_HAS_CQE) == 0)
>  		return sdhci_add_host(host);
>  
>  	dev_dbg(mmc_dev(host->mmc), "CQE is enabled\n");
> @@ -225,7 +227,6 @@ static int sdhci_brcmstb_probe(struct platform_device *pdev)
>  	struct sdhci_brcmstb_priv *priv;
>  	struct sdhci_host *host;
>  	struct resource *iomem;
> -	bool has_cqe = false;
>  	struct clk *clk;
>  	int res;
>  
> @@ -244,10 +245,6 @@ static int sdhci_brcmstb_probe(struct platform_device *pdev)
>  		return res;
>  
>  	memset(&brcmstb_pdata, 0, sizeof(brcmstb_pdata));
> -	if (device_property_read_bool(&pdev->dev, "supports-cqe")) {
> -		has_cqe = true;
> -		match_priv->ops->irq = sdhci_brcmstb_cqhci_irq;
> -	}
>  	brcmstb_pdata.ops = match_priv->ops;
>  	host = sdhci_pltfm_init(pdev, &brcmstb_pdata,
>  				sizeof(struct sdhci_brcmstb_priv));
> @@ -258,7 +255,10 @@ static int sdhci_brcmstb_probe(struct platform_device *pdev)
>  
>  	pltfm_host = sdhci_priv(host);
>  	priv = sdhci_pltfm_priv(pltfm_host);
> -	priv->has_cqe = has_cqe;
> +	if (device_property_read_bool(&pdev->dev, "supports-cqe")) {
> +		priv->flags |= BRCMSTB_PRIV_FLAGS_HAS_CQE;
> +		match_priv->ops->irq = sdhci_brcmstb_cqhci_irq;
> +	}
>  
>  	/* Map in the non-standard CFG registers */
>  	iomem = platform_get_resource(pdev, IORESOURCE_MEM, 1);
> @@ -287,14 +287,14 @@ static int sdhci_brcmstb_probe(struct platform_device *pdev)
>  	 * properties through mmc_of_parse().
>  	 */
>  	host->caps = sdhci_readl(host, SDHCI_CAPABILITIES);
> -	if (match_priv->flags & BRCMSTB_PRIV_FLAGS_NO_64BIT)
> +	if (match_priv->flags & BRCMSTB_MATCH_FLAGS_NO_64BIT)
>  		host->caps &= ~SDHCI_CAN_64BIT;
>  	host->caps1 = sdhci_readl(host, SDHCI_CAPABILITIES_1);
>  	host->caps1 &= ~(SDHCI_SUPPORT_SDR50 | SDHCI_SUPPORT_SDR104 |
>  			 SDHCI_SUPPORT_DDR50);
>  	host->quirks |= SDHCI_QUIRK_MISSING_CAPS;
>  
> -	if (match_priv->flags & BRCMSTB_PRIV_FLAGS_BROKEN_TIMEOUT)
> +	if (match_priv->flags & BRCMSTB_MATCH_FLAGS_BROKEN_TIMEOUT)
>  		host->quirks |= SDHCI_QUIRK_BROKEN_TIMEOUT_VAL;
>  
>  	res = sdhci_brcmstb_add_host(host, priv);


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  parent reply	other threads:[~2022-04-27  6:45 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-21 18:27 [PATCH 0/5] mmc: sdhci-brcmstb: host controller clock enhancements Kamal Dasu
2022-04-21 18:27 ` [PATCH 1/5] mmc: sdhci-brcmstb: "mmc1: Internal clock never stabilised." seen on 72113 Kamal Dasu
2022-04-22 17:14   ` Florian Fainelli
2022-04-27  4:41   ` Adrian Hunter
2022-04-21 18:28 ` [PATCH 2/5] mmc: sdhci-brcmstb: Re-organize flags Kamal Dasu
2022-04-22 17:14   ` Florian Fainelli
2022-04-27  6:43   ` Adrian Hunter [this message]
2022-04-21 18:28 ` [PATCH 3/5] mmc: sdhci-brcmstb: Enable Clock Gating to save power Kamal Dasu
2022-04-22 17:14   ` Florian Fainelli
2022-04-27  6:44   ` Adrian Hunter
2022-04-21 18:28 ` [PATCH 4/5] dt-bindings: mmc: Add Broadcom optional sdio_freq clock Kamal Dasu
2022-04-22 17:07   ` Krzysztof Kozlowski
2022-04-27 15:40     ` Kamal Dasu
2022-04-21 18:28 ` [PATCH 5/5] mmc: sdhci-brcmstb: Add ability to increase max clock rate for 72116b0 Kamal Dasu
2022-04-27  6:45   ` Adrian Hunter

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