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[188.155.176.92]) by smtp.gmail.com with ESMTPSA id f5-20020a1709067f8500b006da68bfdfc7sm5999584ejr.12.2022.04.19.12.43.14 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 19 Apr 2022 12:43:14 -0700 (PDT) Message-ID: Date: Tue, 19 Apr 2022 21:43:13 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.7.0 Subject: Re: Aw: Re: [RFC/RFT 1/6] dt-bindings: phy: rockchip: add pcie3 phy Content-Language: en-US To: Frank Wunderlich Cc: Frank Wunderlich , linux-rockchip@lists.infradead.org, Kishon Vijay Abraham I , Vinod Koul , Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Lorenzo Pieralisi , =?UTF-8?Q?Krzysztof_Wilczy=c5=84ski?= , Bjorn Helgaas , Philipp Zabel , Johan Jonker , Peter Geis , Michael Riesch , linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org References: <20220416135458.104048-1-linux@fw-web.de> <20220416135458.104048-2-linux@fw-web.de> <38e60bb2-123b-09cf-d6ef-3a07c6984108@linaro.org> From: Krzysztof Kozlowski In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220419_124320_404513_6CAB957A X-CRM114-Status: GOOD ( 21.54 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 19/04/2022 19:49, Frank Wunderlich wrote: >> The list should be strictly ordered (defined), so: >> items: >> - const: ... >> - const: ... >> - const: ... >> minItems: 1 >> >> However the question is - why the clocks have different amount? Is it >> per different SoC implementation? > > i only know the rk3568, which needs the clocks defined here, don't know about rk3588 yet. > in rk3568 TPM i have the pcie-part seems missing (at least the specific register definition), so i had used the driver as i got it from the downstream kernel. > > not yet looked if i find a rk3588 TPM and if this part is there as i cannot test it (one of the reasons this is a rfc/rft). You can skip RK3588 compatible or define it this strictly also for that chip. > >>> + >>> + "#phy-cells": >>> + const: 0 >>> + >>> + resets: >>> + maxItems: 1 >>> + >>> + reset-names: >>> + const: phy >>> + >>> + rockchip,phy-grf: >>> + $ref: /schemas/types.yaml#/definitions/phandle >>> + description: phandle to the syscon managing the phy "general register files" >>> + >>> + rockchip,pipe-grf: >>> + $ref: /schemas/types.yaml#/definitions/phandle >>> + description: phandle to the syscon managing the pipe "general register files" >>> + >>> + rockchip,pcie30-phymode: >>> + $ref: '/schemas/types.yaml#/definitions/uint32' >>> + description: | >>> + use PHY_MODE_PCIE_AGGREGATION if not defined >> >> I don't understand the description. Do you mean here a case when the >> variable is missing? > > yes, if the property is not set, then value is PHY_MODE_PCIE_AGGREGATION = 4 Then just use "default: 4" > >>> + minimum: 0x0 >>> + maximum: 0x4 >> >> Please explain these values. Register values should not be part of >> bindings, but instead some logical behavior of hardware or its logic. > > it's a bitmask, so maybe > > description: | > bit0: bifurcation for port 0 > bit1: bifurcation for port 1 > bit2: aggregation That's good. I got impression you have a header with these values. If yes - mention it here. > use PHY_MODE_PCIE_AGGREGATION (4) as default Just use default as I wrote above. Best regards, Krzysztof _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel