> -----Original Message-----
> From: Linus Walleij <linus.walleij@linaro.org>
> Sent: Monday, May 12, 2025 5:06 AM
> To: Rob Herring <robh@kernel.org>; Krzysztof Kozlowski
> <krzk+dt@kernel.org>;
> Conor Dooley <conor+dt@kernel.org>; William Zhang
> <william.zhang@broadcom.com>; Anand Gore <anand.gore@broadcom.com>;
> Kursad Oney <kursad.oney@broadcom.com>; Florian Fainelli
> <florian.fainelli@broadcom.com>; Rafał Miłecki <rafal@milecki.pl>;
> Broadcom
> internal kernel review list <bcm-kernel-feedback-list@broadcom.com>;
> Olivia
> Mackall <olivia@selenic.com>; Ray Jui <rjui@broadcom.com>; Scott Branden
> <sbranden@broadcom.com>; Florian Fainelli <f.fainelli@gmail.com>
> Cc: devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
> linux-
> crypto@vger.kernel.org; Linus Walleij <linus.walleij@linaro.org>
> Subject: [PATCH v3 11/12] ARM64: dts: bcm6858: Add BCMBCA peripherals
>
> All the BCMBCA SoCs share a set of peripherals at 0xff800000,
> albeit at slightly varying memory locations on the bus and
> with varying IRQ assignments. ARM64 SoCs have additional
> peripherals at 0xff858000. Extend the peripheral window range
> to 0x400000 and add the DMA controller at offset 0x59000.
>
> Add the watchdog, GPIO blocks, RNG, LED, second UART and DMA
> blocks for the BCM6858 based on the vendor files 6858_map_part.h
> and 6858_intr.h from the "bcmopen-consumer" code drop.
>
> This SoC has up to 256 possible GPIOs due to having 8
> registers with 32 GPIOs in each available.
>
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---
>  arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi | 119
> ++++++++++++++++++++++-
>  1 file changed, 118 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
> b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
> index
> caeaf428dc15db3089bf4dc62c4a272782c22c3f..c105a734a64897e714ed107e0d
> dccc5eebd415da 100644
> --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
> +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
> @@ -111,11 +111,12 @@ gic: interrupt-controller@1000 {
>  		};
>  	};
>
> +	/* PERF Peripherals */
>  	bus@ff800000 {
>  		compatible = "simple-bus";
>  		#address-cells = <1>;
>  		#size-cells = <1>;
> -		ranges = <0x0 0x0 0xff800000 0x62000>;
> +		ranges = <0x0 0x0 0xff800000 0x400000>;
>
>  		twd: timer-mfd@400 {
>  			compatible = "brcm,bcm4908-twd", "simple-mfd",
> "syscon";
> @@ -136,6 +137,86 @@ watchdog@28 {
>  			};
>  		};
>
> +		/* GPIOs 0 .. 31 */
> +		gpio0: gpio@500 {
> +			compatible = "brcm,bcm6345-gpio";
> +			reg = <0x500 0x04>, <0x520 0x04>;
> +			reg-names = "dirout", "dat";
> +			gpio-controller;
> +			#gpio-cells = <2>;
> +			status = "disabled";
> +		};
> +
> +		/* GPIOs 32 .. 63 */
> +		gpio1: gpio@504 {
> +			compatible = "brcm,bcm6345-gpio";
> +			reg = <0x504 0x04>, <0x524 0x04>;
> +			reg-names = "dirout", "dat";
> +			gpio-controller;
> +			#gpio-cells = <2>;
> +			status = "disabled";
> +		};
> +
> +		/* GPIOs 64 .. 95 */
> +		gpio2: gpio@508 {
> +			compatible = "brcm,bcm6345-gpio";
> +			reg = <0x508 0x04>, <0x528 0x04>;
> +			reg-names = "dirout", "dat";
> +			gpio-controller;
> +			#gpio-cells = <2>;
> +			status = "disabled";
> +		};
> +
> +		/* GPIOs 96 .. 127 */
> +		gpio3: gpio@50c {
> +			compatible = "brcm,bcm6345-gpio";
> +			reg = <0x50c 0x04>, <0x52c 0x04>;
> +			reg-names = "dirout", "dat";
> +			gpio-controller;
> +			#gpio-cells = <2>;
> +			status = "disabled";
> +		};
> +
> +		/* GPIOs 128 .. 159 */
> +		gpio4: gpio@510 {
> +			compatible = "brcm,bcm6345-gpio";
> +			reg = <0x510 0x04>, <0x530 0x04>;
> +			reg-names = "dirout", "dat";
> +			gpio-controller;
> +			#gpio-cells = <2>;
> +			status = "disabled";
> +		};
> +
> +		/* GPIOs 160 .. 191 */
> +		gpio5: gpio@514 {
> +			compatible = "brcm,bcm6345-gpio";
> +			reg = <0x514 0x04>, <0x534 0x04>;
> +			reg-names = "dirout", "dat";
> +			gpio-controller;
> +			#gpio-cells = <2>;
> +			status = "disabled";
> +		};
> +
> +		/* GPIOs 192 .. 223 */
> +		gpio6: gpio@518 {
> +			compatible = "brcm,bcm6345-gpio";
> +			reg = <0x518 0x04>, <0x538 0x04>;
> +			reg-names = "dirout", "dat";
> +			gpio-controller;
> +			#gpio-cells = <2>;
> +			status = "disabled";
> +		};
> +
> +		/* GPIOs 224 .. 255 */
> +		gpio7: gpio@51c {
> +			compatible = "brcm,bcm6345-gpio";
> +			reg = <0x51c 0x04>, <0x53c 0x04>;
> +			reg-names = "dirout", "dat";
> +			gpio-controller;
> +			#gpio-cells = <2>;
> +			status = "disabled";
> +		};
> +
>  		uart0: serial@640 {
>  			compatible = "brcm,bcm6345-uart";
>  			reg = <0x640 0x18>;
> @@ -145,6 +226,29 @@ uart0: serial@640 {
>  			status = "disabled";
>  		};
>
> +		uart1: serial@660 {
> +			compatible = "brcm,bcm6345-uart";
> +			reg = <0x660 0x18>;
> +			interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&periph_clk>;
> +			clock-names = "refclk";
> +			status = "disabled";
> +		};
> +
> +		leds: led-controller@800 {
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			compatible = "brcm,bcm63138-leds";
> +			reg = <0x800 0xdc>;
> +			status = "disabled";
> +		};
> +
> +		rng@b80 {
> +			compatible = "brcm,iproc-rng200";
> +			reg = <0xb80 0x28>;
> +			interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
> +		};
> +
>  		hsspi: spi@1000 {
>  			#address-cells = <1>;
>  			#size-cells = <0>;
> @@ -170,5 +274,18 @@ nandcs: nand@0 {
>  				reg = <0>;
>  			};
>  		};
> +
> +		pl081_dma: dma-controller@59000 {
> +			compatible = "arm,pl081", "arm,primecell";
> +			// The magic B105F00D info is missing
> +			arm,primecell-periphid = <0x00041081>;
> +			reg = <0x59000 0x1000>;
> +			interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
> +			memcpy-burst-size = <256>;
> +			memcpy-bus-width = <32>;
> +			clocks = <&periph_clk>;
> +			clock-names = "apb_pclk";
> +			#dma-cells = <2>;
> +		};
>  	};
>  };
>
> --
> 2.49.0

Reviewed-by: William Zhang <william.zhang@broadcom.com>