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Sat, 18 Nov 2023 03:21:13 -0800 (PST) Received: from [192.168.100.102] ([37.228.218.3]) by smtp.gmail.com with ESMTPSA id p6-20020a5d68c6000000b0032fdcbfb093sm5109586wrw.81.2023.11.18.03.21.12 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 18 Nov 2023 03:21:12 -0800 (PST) Message-ID: Date: Sat, 18 Nov 2023 11:21:11 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 0/6] Add support for Translation Buffer Units Content-Language: en-US To: Georgi Djakov , robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, will@kernel.org, robin.murphy@arm.com, joro@8bytes.org Cc: devicetree@vger.kernel.org, andersson@kernel.org, konrad.dybcio@linaro.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, quic_cgoldswo@quicinc.com, quic_sukadev@quicinc.com, quic_pdaly@quicinc.com, quic_sudaraja@quicinc.com, djakov@kernel.org References: <20231118042730.2799-1-quic_c_gdjako@quicinc.com> From: Bryan O'Donoghue In-Reply-To: <20231118042730.2799-1-quic_c_gdjako@quicinc.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231118_032120_610135_D19C6338 X-CRM114-Status: GOOD ( 16.83 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 18/11/2023 04:27, Georgi Djakov wrote: > The TCUs (Translation Control Units) and TBUs (Translation Buffer > Units) are key components of the MMU-500. Multiple TBUs are connected > to a single TCU over an interconnect. Each TBU contains a TLB that > caches page tables. The MMU-500 implements a TBU for each connected > master, and the TBU is designed, so that it is local to the master. > > The Qualcomm SDM845 platform has an implementation of the SMMU-500, > that has multiple TBUs. A DT schema is added to describe the resources > for each TBU (register space, power-domains, interconnects and clocks). > > The TBU driver will manage the resources and allow the system to > operate the TBUs during a context fault to obtain details by doing > s1 inv, software + hardware page table walks etc. This is implemented > with ATOS/eCATs as the ATS feature is not supported. Being able to > query the TBUs is useful for debugging various hardware/software > issues on these platforms. > > v2: > - Improve DT binding description, add full example. (Konrad) > - Drop Qcom specific stuff from the generic binding. (Rob) > - Unconditionally try to populate subnodes. (Konrad) > - Improve TBU driver commit text, remove memory barriers. (Bjorn) > - Move TBU stuff into separate file. Make the driver builtin. > - TODO: Evaluate whether to keep TBU support as a separate driver > or just instantiate things from qcom_smmu_impl_init() > > v1: https://lore.kernel.org/r/20231019021923.13939-1-quic_c_gdjako@quicinc.com What is your suggested way to test this series ? --- bod _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel