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Mon, 27 Oct 2025 08:17:45 -0700 (PDT) Received: from [10.25.208.2] ([128.77.115.157]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b6d85308cb0sm809592766b.9.2025.10.27.08.17.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Oct 2025 08:17:45 -0700 (PDT) Message-ID: Date: Mon, 27 Oct 2025 08:17:40 -0700 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 2/8] dt-bindings: clock: document 8ULP's SIM LPAV To: Peng Fan Cc: Abel Vesa , Peng Fan , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Fabio Estevam , Philipp Zabel , Daniel Baluta , Shengjiu Wang , linux-clk@vger.kernel.org, imx@lists.linux.dev, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Pengutronix Kernel Team References: <20251017112025.11997-1-laurentiumihalcea111@gmail.com> <20251017112025.11997-3-laurentiumihalcea111@gmail.com> <20251022140841.GB11174@nxa18884-linux.ap.freescale.net> Content-Language: en-US From: Laurentiu Mihalcea In-Reply-To: <20251022140841.GB11174@nxa18884-linux.ap.freescale.net> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20251027_081748_119929_9882678E X-CRM114-Status: GOOD ( 16.64 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 10/22/2025 7:08 AM, Peng Fan wrote: > Hi Laurentiu, > > On Fri, Oct 17, 2025 at 04:20:19AM -0700, Laurentiu Mihalcea wrote: >> From: Laurentiu Mihalcea >> >> Add documentation for i.MX8ULP's SIM LPAV module. >> >> Signed-off-by: Laurentiu Mihalcea >> --- >> +description: >> + The i.MX8ULP LPAV subsystem contains a block control module known as >> + SIM LPAV, which offers functionalities such as clock gating or reset >> + line assertion/de-assertion. >> + >> +properties: >> + compatible: >> + const: fsl,imx8ulp-sim-lpav > This block also contains QoS registers, General purpose registers, HIFI > general purpose registers, and others. > > I am not sure whether need to add a syscon fallback here. dt maintainer may > help comment. syscon programming model is NOT compatible with this programming model. If you need access to other registers (not covered by reset/MUX/clock APIs), you're going to have to either go through a subsystem API or manually create a device link between SIM LPAV and your consumer and then use something like dev_get_regmap(). Either way, you need to make sure that you're using the same lock for register access. as for the interconnect QoS-related stuff: can't really comment on this as I haven't worked with it, nor do I have an use case for it ATM. However, the binding does need to be complete so suggestions in this regard would be much appreciated. > > Regards, > Peng