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Wed, 12 Feb 2025 23:10:57 -0800 (PST) Received: from [192.168.0.14] ([79.115.63.124]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5dece1d349esm659748a12.33.2025.02.12.23.10.54 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 12 Feb 2025 23:10:56 -0800 (PST) Message-ID: Date: Thu, 13 Feb 2025 07:10:54 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 2/2] spi: s3c64xx: add support exynos990-spi to new port config data To: Denzeel Oliva , andi.shyti@kernel.org, broonie@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, alim.akhtar@samsung.com, peter.griffin@linaro.org, andre.draszik@linaro.org, linux-spi@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org References: <20250212191241.280-1-wachiturroxd150@gmail.com> <20250212191241.280-3-wachiturroxd150@gmail.com> Content-Language: en-US From: Tudor Ambarus In-Reply-To: <20250212191241.280-3-wachiturroxd150@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250212_231058_836616_4FD8DA09 X-CRM114-Status: UNSURE ( 9.05 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2/12/25 7:12 PM, Denzeel Oliva wrote: > +static const struct s3c64xx_spi_port_config exynos990_spi_port_config = { > + /* fifo-depth must be specified in the device tree. */ > + .fifo_depth = 0, have you tried testing without specifying the fifo_depth in DT? You'll probably hit a divide by zero at: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/tree/drivers/spi/spi-s3c64xx.c#n664 I assume the controller can work with 0 sized FIFO depth, and if so, the driver has to be updated to allow 0 sized FIFOs. btw, how did you test the set?