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charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260914_191132_849447_E03DC89D X-CRM114-Status: GOOD ( 13.00 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 03/09/26 16:38, Florian Fainelli wrote: > On 8/18/26 03:35, Maíra Canal wrote: >> Hi Krzysztof, >> >> On 18/08/26 06:05, Krzysztof Kozlowski wrote: >>> On Sun, Aug 16, 2026 at 11:05:41AM -0300, Maíra Canal wrote: >>>> The BCM2835 PM block has exposed a reset line for the V3D block since >>>> commit 670c672608a1 ("soc: bcm: bcm2835-pm: Add support for power >>>> domains >>> >>> This is a reset provider driver, so not really relevant here. Driver >>> commit would be relevant if it was about consumer who implemented >>> undocumented ABI. I suggest to drop reference to driver and instead >>> describe the hardware. >> >> Ack. >> >>> >>>> under a new binding."), which allows the GPU to be reset without >>>> power-cycling its domain. Document it so that the vc4 driver can use >>>> it to >>>> recover from a GPU hang. >>> >>> Does every device have it? Cygnus as well? >> >> I'm not familiar to the Cygnus hardware, only Raspberry Pi, so I'd >> appreciate if one of the folks from Broadcom could help us with this >> information. >> >> However, just like the power domain, I added this property as optional >> to accommodate the fact that the current Cygnus DT doesn't expose any >> power domain or reset controller. > > I really don't know and have no visibility into these older chips, let's > assume they don't. Considering Florian's feedback, what would you suggest, Krzysztof? Should I document that not all devices have a reset line? Best regards, - Maíra