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X-MS-Exchange-CrossTenant-UserPrincipalName: t0Co0X5rIq3O4WD8zweK5rjoBwS6W6kIyFEF67TfH417yExv7Vhx0Ela8IrGgeKw7vZz0Zjy1ck9x82/Xdsdx+VG0RI9tOTAVJXJPrSOxwvl/lzzS9rhaEQH7sRAOho4 X-MS-Exchange-Transport-CrossTenantHeadersStamped: DU2PR04MB8583 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260504_061439_726680_B09E7B41 X-CRM114-Status: GOOD ( 35.19 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 5/4/2026 3:41 PM, Khristine Andreea Barbulescu wrote: > This patch series adds support for basic GPIO > operations(set, get, direction_output/input, set_config). > > There are two SIUL2 hardware modules: SIUL2_0 and SIUL2_1. > However, this driver exports both as a single GPIO driver. > This is because the interrupt registers are located only > in SIUL2_1, even for GPIOs that are part of SIUL2_0. > > There are two gaps in the GPIO ranges: > - 102-111(inclusive) are invalid > - 123-143(inclusive) are invalid > > Writing and reading GPIO values is done via the PGPDO/PGPDI > registers(Parallel GPIO Pad Data Output/Input) which are > 16 bit registers, each bit corresponding to a GPIO. > > Note that the PGPDO order is similar to a big-endian grouping > of two registers: > PGPDO1, PGPDO0, PGPDO3, PGPDO2, PGPDO5, PGPDO4, gap, PGPDO6. > > v9 -> v8 > - remove the SIUL2 syscon child nodes from the > device tree and DT bindings > - remove syscon child handling from the MFD > and pinctrl drivers > - remove the MFD driver and use a single monolithic > pinctrl/gpio/irqchip driver > - add a new compatible for the pinctrl+gpio binding > while keeping the previous compatible for the legacy > pinctrl-only binding > - update bindings to include the PGPDO/PGPDI and > IRQ register regions in the DT node for the > pinctrl/gpio/irq binding > - add IRQ-related entries in the bindings to > document the intended hierarchy; IRQ support > itself will be added in a future patch series > - update DT nodes to match the new hierarchy and > compatible scheme > - fix dtb warnings > - reorder commits: bug fixes, API changes, DT bindings, > driver implementation, DTS changes > - split commits further to separate minor > style-only adjustments > > v8 -> v7 > - remove all ': true' lines from properties in dt bindings > - remove NVMEM MFD cell from SIUL2 in dtsi > - remove NVMEM driver and configs > - expose SoC information via syscon cells SIUL2_0 > and SIUL2_1 in MFD driver > - add SIUL2_0 and SIUL2_1 syscon nodes in dtsi > - add patternProperties for "^siul2_[0-1]$" for syscon nodes > - update example to include syscon cells with proper format > - remove `reg` property from pinctrl node in dt binding > - update Kconfig help text to reflect new syscon structure > instead of NVMEM for SoC information > - squash deprecated SIUL2 pinctrl binding with new MFD binding > - dropped "nxp,s32g3-siul2" from MFD driver match table > - fixed commit messages > - fixed dtb warnings > > v7 -> v6 > - fixed MAINTAINERS wrong file path > - add unevaluatedProperties, change siul2 node name, remove > jtag_pins label in the device tree schema > - change compatible definition in schema > - change node name in dtsi > - mentioned binding deprecation in commit messages > - split mfd cell conversion commit in two: one for the > previous refactoring, one for the mfd cell conversion > - removed Acked-by: Linus Walleij from commit: > "pinctrl: s32: convert the driver into an mfd cell" > because of changes to that commit > - deprecate the nxp,s32g2-siul2-pinctrl binding > - add NVMEM MFD cell for SIUL2 > - made the GPIO driver not export invalid pins > (there are some gaps 102-111, 123-143) > - removed the need for gpio-reserved-ranges > - force initialized pinctrl_desc->num_custom_params to 0 > > v6 -> v5 > - removed description for reg in the dt-bindings and added > maxItems > - dropped label for example in the dt-bindings > - simplified the example in the dt-bindings > - changed dt-bindings filename to nxp,s32g2-siul2.yaml > - changed title in the dt-bindings > - dropped minItmes from gpio-ranges/gpio-reserved-ranges > and added maxItems to gpio-reserved-ranges > - added required block for -grp[0-9]$ nodes > - switch to using "" as quotes > - kernel test robot: fixed frame sizes, added description > for reg_name, fixed typo in gpio_configs_lock, removed > uninitialized ret variable usage > - ordered includes in nxp-siul2.c, switched to dev-err-probe > added a mention that other commits will add nvmem functionality > to the mfd driver > - switched spin_lock_irqsave to scoped_guard statement > - switched dev_err to dev_err_probe in pinctrl-s32cc in places > reached during the probing part > > v5 -> v4 > - fixed di_div error > - fixed dt-bindings error > - added Co-developed-by tags > - added new MFD driver nxp-siul2.c > - made the old pinctrl driver an MFD cell > - added the GPIO driver in the existing SIUL2 pinctrl one > - Switch from "devm_pinctrl_register" to > "devm_pinctrl_register_and_init" > > v4 -> v3 > - removed useless parentheses > - added S32G3 fallback compatible > - fixed comment alignment > - fixed dt-bindings license > - fixed modpost: "__udivdi3" > - moved MAINTAINERS entry to have the new GPIO driver > together with other files related to S32G > > v3 -> v2 > - fix dt-bindings schema id > - add maxItems to gpio-ranges > - removed gpio label from dt-bindings example > - added changelog for the MAINTAINERS commit and > added separate entry for the SIUL2 GPIO driver > - added guard(raw_spinlock_irqsave) in > 'siul2_gpio_set_direction' > - updated the description for > 'devm_platform_get_and_ioremap_resource_byname' > > v2 -> v1 > dt-bindings: > - changed filename to match compatible > - fixed commit messages > - removed dt-bindings unnecessary properties descriptions > - added minItems for the interrupts property > driver: > - added depends on ARCH_S32 || COMPILE_TEST to Kconfig > - added select REGMAP_MMIO to Kconfig > - remove unnecessary include > - add of_node_put after `siul2_get_gpio_pinspec` > - removed inline from function definitions > - removed match data and moved the previous platdata > definition to the top of the file to be visible > - replace bitmap_set/clear with __clear_bit/set_bit > and devm_bitmap_zalloc with devm_kzalloc > - switched to gpiochip_generic_request/free/config > - fixed dev_err format for size_t reported by > kernel test robot > - add platform_get_and_ioremap_resource_byname wrapper > Andrei Stefanescu (2): > pinctrl: s32cc: change to "devm_pinctrl_register_and_init" > pinctrl: s32cc: implement GPIO functionality > > Khristine Andreea Barbulescu (5): > pinctrl: s32cc: use dev_err_probe() and improve error messages > pinctrl: s32cc: add/fix some comments > pinctrl: s32cc: remove inline specifiers > dt-bindings: pinctrl: s32g2-siul2: describe GPIO and EIRQ resources > arm64: dts: s32g: describe GPIO and EIRQ resources in SIUL2 pinctrl > node > > .../pinctrl/nxp,s32g2-siul2-pinctrl.yaml | 107 ++- > arch/arm64/boot/dts/freescale/s32g2.dtsi | 26 +- > arch/arm64/boot/dts/freescale/s32g3.dtsi | 26 +- > drivers/pinctrl/nxp/pinctrl-s32.h | 15 +- > drivers/pinctrl/nxp/pinctrl-s32cc.c | 646 ++++++++++++++---- > drivers/pinctrl/nxp/pinctrl-s32g2.c | 25 +- > 6 files changed, 707 insertions(+), 138 deletions(-) > Hello, Please disregard the submission of this patch series. I have resent it because this version did not have the "v9" tag appended in the patch subjects. Regards, Khristine