From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5D5E6C433E0 for ; Mon, 4 Jan 2021 14:04:55 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0C9D6221E5 for ; Mon, 4 Jan 2021 14:04:55 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 0C9D6221E5 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:Message-ID:From: References:To:Subject:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=+uyJqVdYaq4OieQBt3uebd03ItiVw/qoUO5XpjdOgC8=; b=DzRjvjzzsATgcM33OaVNBn/4o UiUmZDz9npgQMiDyT0h7shj3Fme65aFd9TITCne9GviSLBxZCb5ybT/Uhd9HM2AnmWN8A2p4r+dNZ YiwZTy7LZpZbtkiUL9bKK7bN/ZvTRp3Neh6Ele9hXht69qQR45gDIQUYDTZLyu0/HFBcIv2wXBPqZ 7Ng0D34PlutGRjc6M8q2BRyFbroUN8Baz5RyGEs8OkcPmmK1ZoeGyNvU2mZ0jQpYeu/tHUFsVa5ec 6Usk0mN76cIfrBPsIKU+nvo3MOjztYc67Pe+QtNQrAFY4mUbkV7uIxJX17edt/5QtnvNuGtg54jkh Ftnz7PhPQ==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kwQRy-00007q-IX; Mon, 04 Jan 2021 14:03:10 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kwQRx-00007T-0Q for linux-arm-kernel@lists.infradead.org; Mon, 04 Jan 2021 14:03:09 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7FF151FB; Mon, 4 Jan 2021 06:03:07 -0800 (PST) Received: from [10.37.12.15] (unknown [10.37.12.15]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 5AFD63F719; Mon, 4 Jan 2021 06:03:06 -0800 (PST) Subject: Re: [PATCH] arm64: Move PSTATE.TCO setting to separate functions To: Catalin Marinas , linux-arm-kernel@lists.infradead.org References: <20210104124715.12826-1-catalin.marinas@arm.com> From: Vincenzo Frascino Message-ID: Date: Mon, 4 Jan 2021 14:06:44 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <20210104124715.12826-1-catalin.marinas@arm.com> Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210104_090309_117259_2435321F X-CRM114-Status: GOOD ( 18.48 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Will Deacon Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 1/4/21 12:47 PM, Catalin Marinas wrote: > For consistency with __uaccess_{disable,enable}_hw_pan(), move the > PSTATE.TCO setting into dedicated __uaccess_{disable,enable}_tco() > functions. > > Signed-off-by: Catalin Marinas > Cc: Vincenzo Frascino > Cc: Mark Rutland Looks nicer like this! Thanks! We should probably update the comment on top of uaccess_disable_privileged() to reflect the introduction of the new API, otherwise: Acked-by: Vincenzo Frascino > --- > arch/arm64/include/asm/uaccess.h | 18 ++++++++++++++---- > 1 file changed, 14 insertions(+), 4 deletions(-) > > diff --git a/arch/arm64/include/asm/uaccess.h b/arch/arm64/include/asm/uaccess.h > index 6f986e09a781..534a7d33b12f 100644 > --- a/arch/arm64/include/asm/uaccess.h > +++ b/arch/arm64/include/asm/uaccess.h > @@ -159,6 +159,18 @@ static inline void __uaccess_enable_hw_pan(void) > CONFIG_ARM64_PAN)); > } > > +static inline void __uaccess_disable_tco(void) > +{ > + asm volatile(ALTERNATIVE("nop", SET_PSTATE_TCO(0), > + ARM64_MTE, CONFIG_KASAN_HW_TAGS)); > +} > + > +static inline void __uaccess_enable_tco(void) > +{ > + asm volatile(ALTERNATIVE("nop", SET_PSTATE_TCO(1), > + ARM64_MTE, CONFIG_KASAN_HW_TAGS)); > +} > + > /* > * The Tag Check Flag (TCF) mode for MTE is per EL, hence TCF0 > * affects EL0 and TCF affects EL1 irrespective of which TTBR is > @@ -178,8 +190,7 @@ static inline void __uaccess_enable_hw_pan(void) > */ > static inline void uaccess_disable_privileged(void) > { > - asm volatile(ALTERNATIVE("nop", SET_PSTATE_TCO(0), > - ARM64_MTE, CONFIG_KASAN_HW_TAGS)); > + __uaccess_disable_tco(); > > if (uaccess_ttbr0_disable()) > return; > @@ -189,8 +200,7 @@ static inline void uaccess_disable_privileged(void) > > static inline void uaccess_enable_privileged(void) > { > - asm volatile(ALTERNATIVE("nop", SET_PSTATE_TCO(1), > - ARM64_MTE, CONFIG_KASAN_HW_TAGS)); > + __uaccess_enable_tco(); > > if (uaccess_ttbr0_enable()) > return; > -- Regards, Vincenzo _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel