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Fri, 19 Jul 2024 06:40:27 +0200 Message-ID: Date: Fri, 19 Jul 2024 06:40:26 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: mx93: No cache hierachy definitions for ARM cores To: Fabio Estevam , Frank Li Cc: Peng Fan , Shawn Guo , Sascha Hauer , imx@lists.linux.dev, Pengutronix Kernel Team , Linux ARM References: Content-Language: en-US From: Stefan Wahren In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: quoted-printable X-Provags-ID: V03:K1:x1Dbd1ZoXSQf9pwosY683uPJJsofa4auhTgbAP5LiBuFPPW1LNW G4hwXTUKbCdayQy4jBNnXtOcsMDardwhrqOzLPCXKZWLo4fktbPeOjdSytNF4JEIPofJWF5 F+DwlVieaa9K3C47uqqWL/EWOjmojOOE5KDk4jgwFLsZGaiyPcoOcDmbBPt6N1O/yWc3oM7 H5n6F6vaxYl7dB8XdKmVA== UI-OutboundReport: notjunk:1;M01:P0:rJFBQrSnXhQ=;uvf/Ok24/7GfkM1j6g4YAilBzzV PZXS0937WNyl2az1xzlSITsELw7xzJQFHFgtYDYdm5C+j+ukG6iQsA297vV2j55SfB6BChdSr 0aN+/mitnpoTrc65xc573heRLShiLX/HlWsb+TR/ZPMigZXtywLOg/wR+zXmBtfsTo7+MWCa1 Yw22sVH0UevR/RjKZz11nAAFshhrOOHuL2hxF5xN1n3MHbZRPCUxO90ZBGqt5asV+chqZIDQT Ro0L5KTZcsoopcM4lMLcc1rrwNvJm9yWZ5oXVQlJ+T6Q5BMh4HQGldStdaWJFtdlaKUjZLUw7 gyQ5gvWPWqaJ19XWKGNtbDfEuQPmieCsjogUxpOra9S3gBaBbzDP5ZdFloqrY8tILEhG6FFm1 QqHI4c6G4RvRI3kRFT7ihFgCbwet4eP5+2G5ccnpP9PlzF/HKOstgr/NBh0Gcy9hgLDs//ueK +uG5dys6qExRDhFHHbiL6qbkOU3nxQFElh5iKpyRcR4ERtbrbDylJgqL3hS3DXq+NrT9+EN56 Kjt5gEosEGJibpMrmLJMZL1Eqgj4eJHYU5RY9axaVbCpT1e+hHie18jvi7FvrxnlXb+FcNuKS sudwlrC++D7IwOzc3QK+DmhN6fo3Ni3YqPflx7YDspSLiAS52hDD7P49RJpHrd3ltkZitF7eb KwXPx84IJlFBr6jfrKN1xGChYmban4pckSfCFYQjs27/AL7YiZzS8qqkxhmF1PwKfTVdu+uZP 1s+j/Ak2aTnVk5+qIIbMCNXQDIO/yugPZqGXI0seQD9/rgHkIQWWATDY5juqvpWIPOkHhpkRV 7pQi0wWxGwXJQvvUuizhFsFQ== X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240718_214037_208940_7FA840A2 X-CRM114-Status: GOOD ( 10.71 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi, Am 19.07.24 um 04:38 schrieb Fabio Estevam: > On Wed, Jul 17, 2024 at 2:49=E2=80=AFPM Stefan Wahren = wrote: >> Hi, >> today i noticed that imx93.dtsi lacks the cache definitions for the >> Cortex-A55 cores: >> >> cacheinfo: Unable to detect cache hierarchy for CPU 0 >> >> Maybe someone with more insight can add this to the imx93.dtsi file. > Frank, can you help? > the description for caches can be found in the device tree spezification [1]. AFAIK there is no specific binding in the kernel documentation. Maybe a good example for reference would be [2]. Regards [1] - https://github.com/devicetree-org/devicetree-specification [2] - https://elixir.bootlin.com/linux/v6.10/source/arch/arm64/boot/dts/rockchip= /rk3588s.dtsi