From: jason.mcmullan@netronome.com (Jason McMullan)
To: linux-arm-kernel@lists.infradead.org
Subject: Add support for the 16-way L310 L2 cache controller
Date: Fri, 30 Apr 2010 13:17:39 -0400 [thread overview]
Message-ID: <k2nd91d07041004301017s5663c595o62c22c2d47ce1153@mail.gmail.com> (raw)
In-Reply-To: <3756028016583358140@unknownmsgid>
On Thu, Apr 29, 2010 at 12:20 PM, Will Deacon <will.deacon@arm.com> wrote:
> The patch entitled `Add support for the 16-way L310 L2 cache controller'
> which you submitted to RMK's patch system appears to perform a 16-way
> invalidation even when the ways might not be present. This results in
> writes to the reserved bits [15:8] of the invalidate-by-way ctrl register.
Good catch Will. I'll update it, and sent it to the list.
--
Jason S. McMullan
jaosn.mcmullan at netronome.com
next parent reply other threads:[~2010-04-30 17:17 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <3756028016583358140@unknownmsgid>
2010-04-30 17:17 ` Jason McMullan [this message]
[not found] <-5319252541413655868@unknownmsgid>
2010-05-03 16:48 ` Add support for the 16-way L310 L2 cache controller Jason McMullan
2010-04-29 16:20 Will Deacon
2010-04-29 18:28 ` Russell King - ARM Linux
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