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From: "Krzysztof Hałasa" <khalasa@piap.pl>
To: Paul Kocialkowski <paulk@sys-base.io>
Cc: <dri-devel@lists.freedesktop.org>,  <imx@lists.linux.dev>,
	<linux-arm-kernel@lists.infradead.org>,
	 <linux-kernel@vger.kernel.org>, Marek Vasut <marex@denx.de>,
	 Stefan Agner <stefan@agner.ch>,
	 Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
	 Maxime Ripard <mripard@kernel.org>,
	 Thomas Zimmermann <tzimmermann@suse.de>,
	 David Airlie <airlied@gmail.com>,
	 Simona Vetter <simona@ffwll.ch>,  Frank Li <Frank.Li@nxp.com>,
	 Sascha Hauer <s.hauer@pengutronix.de>,
	 Pengutronix Kernel Team <kernel@pengutronix.de>,
	 Fabio Estevam <festevam@gmail.com>,
	Lucas Stach <l.stach@pengutronix.de>,
	 Marco Felsch <m.felsch@pengutronix.de>,
	 Liu Ying <victor.liu@nxp.com>
Subject: Re: [PATCH 3/3] drm: lcdif: Wait for vblank before disabling DMA
Date: Fri, 03 Apr 2026 06:36:55 +0200	[thread overview]
Message-ID: <m3ldf4mzh4.fsf@t19.piap.pl> (raw)
In-Reply-To: <ac6eQcDS8lr-A4ia@shepard> (Paul Kocialkowski's message of "Thu, 2 Apr 2026 18:50:09 +0200")

Hi Paul,

Paul Kocialkowski <paulk@sys-base.io> writes:

> Interestingly I tried to keep the clocks always on as an experiment and it
> had the opposite effect: the DMA engine would get confused every time after the
> first mode set and disable. So for some reason the disabling of the clocks seems
> to mitigate the issue rather than aggravate it.

Interesting. Fortunately we have a workaround.

>> > +       ret = readl_poll_timeout(lcdif->base + LCDC_V8_CTRLDESCL0_5,
>> > +                                reg, !(reg & CTRLDESCL0_5_SHADOW_LOAD_EN),
>> > +                                0, 36000);     /* Wait ~2 frame times max */
>> 
>> I guess this comment is not necessarily correct - at 2160p30 one frame =
>> ca. 33 ms. Still works, though (I guess anything more than one frame is
>> enough). I don't know how long a frame on HDMI (or LVDS, MIPI etc.) can
>> take. 30 FPS on 2160p is common because the i.MX8MP can't display 2160p60.
>
> Honestly I think we're good assuming 30 fps (33 ms) is a lower bound.
> And the current 36 ms goes even beyond, so I think it's fine.

Right. It is just the comment in the code which is not exactly true.
I.e., we "wait for at least 1 complete frame time". I guess.
Also, the 25 ms in the patch (commit) message is no longer accurate.

>> Also, found an issue. Perhaps unrelated? Powered the board without HDMI
>> connected. Then connected 1080p60 display. It came in 1024x768, console
>> 64x24 :-)
>
> That looks more related to a failure to fetch the EDID from the monitor.
> 1024x768 is the default fallback that is used in this situation.
> Maybe check if there is something wrong with the DDC lines from the hdmi
> controller, maybe pinmux etc.

No no no, I did that on purpose - the monitor was really disconnected at
the boot time. Only then (but before starting weston) i reconnected it.
But it indeed appears to be a separate issue, a software one - a mutex
deadlock on access to clocks and power management. Both enable and
disable paths interfere there. "I will post a patch when I have a patch
to post" :-)

Thanks,
-- 
Krzysztof "Chris" Hałasa

Sieć Badawcza Łukasiewicz
Przemysłowy Instytut Automatyki i Pomiarów PIAP
Al. Jerozolimskie 202, 02-486 Warszawa


  reply	other threads:[~2026-04-03  4:37 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-30 22:46 [PATCH 0/3] drm: lcdif: FIFO underrun/solid color bug fix Paul Kocialkowski
2026-03-30 22:46 ` [PATCH 1/3] drm: lcdif: Set undocumented bit to clear FIFO at vsync Paul Kocialkowski
2026-03-31  9:07   ` Lucas Stach
2026-03-30 22:46 ` [PATCH 2/3] drm: lcdif: Use dedicated set/clr registers for polarity/edge Paul Kocialkowski
2026-03-31  9:09   ` Lucas Stach
2026-03-31 15:17     ` Paul Kocialkowski
2026-03-31 16:04       ` Lucas Stach
2026-04-02 16:08         ` Paul Kocialkowski
2026-03-30 22:46 ` [PATCH 3/3] drm: lcdif: Wait for vblank before disabling DMA Paul Kocialkowski
2026-03-31  9:14   ` Lucas Stach
2026-04-02 18:29     ` Paul Kocialkowski
2026-03-31 10:11   ` Krzysztof Hałasa
2026-04-02 16:50     ` Paul Kocialkowski
2026-04-03  4:36       ` Krzysztof Hałasa [this message]
2026-04-03  4:43         ` Krzysztof Hałasa
2026-04-04 19:29         ` Paul Kocialkowski

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