* [PATCH 2/6] ARM: Use SMP and UP macros for cacheflush
@ 2010-09-02 15:20 Tony Lindgren
0 siblings, 0 replies; 5+ messages in thread
From: Tony Lindgren @ 2010-09-02 15:20 UTC (permalink / raw)
To: linux-arm-kernel
Use SMP and UP macros for cacheflush. Note that __flush_icache_all
currently won't work properly on ARMv7 SMP if support for ARMv6 is
compiled in.
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
arch/arm/include/asm/cacheflush.h | 7 +++++--
1 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h
index 4656a24..09a893e 100644
--- a/arch/arm/include/asm/cacheflush.h
+++ b/arch/arm/include/asm/cacheflush.h
@@ -16,6 +16,7 @@
#include <asm/shmparam.h>
#include <asm/cachetype.h>
#include <asm/outercache.h>
+#include <asm/smp_plat.h>
#define CACHE_COLOUR(vaddr) ((vaddr & (SHMLBA - 1)) >> PAGE_SHIFT)
@@ -372,8 +373,10 @@ static inline void __flush_icache_all(void)
extern void v6_icache_inval_all(void);
v6_icache_inval_all();
#elif defined(CONFIG_SMP) && __LINUX_ARM_ARCH__ >= 7
- asm("mcr p15, 0, %0, c7, c1, 0 @ invalidate I-cache inner shareable\n"
- :
+ asm( \
+ SMP(mcr p15, 0, %0, c7, c1, 0 @ inv I-cache inner shareable) \
+ UP(mcr p15, 0, %0, c7, c5, 0 @ invalidate I-cache) \
+ : \
: "r" (0));
#else
asm("mcr p15, 0, %0, c7, c5, 0 @ invalidate I-cache\n"
--
1.7.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 2/6] ARM: Use SMP and UP macros for cacheflush
2010-09-02 16:16 ` Tony Lindgren
@ 2010-09-02 16:19 ` Tony Lindgren
2010-09-03 11:57 ` Shilimkar, Santosh
0 siblings, 1 reply; 5+ messages in thread
From: Tony Lindgren @ 2010-09-02 16:19 UTC (permalink / raw)
To: linux-arm-kernel
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 2/6] ARM: Use SMP and UP macros for cacheflush
2010-09-02 16:19 ` [PATCH 2/6] ARM: Use SMP and UP macros for cacheflush Tony Lindgren
@ 2010-09-03 11:57 ` Shilimkar, Santosh
2010-09-04 10:57 ` Russell King - ARM Linux
0 siblings, 1 reply; 5+ messages in thread
From: Shilimkar, Santosh @ 2010-09-03 11:57 UTC (permalink / raw)
To: linux-arm-kernel
> -----Original Message-----
> From: linux-omap-owner at vger.kernel.org [mailto:linux-omap-
> owner at vger.kernel.org] On Behalf Of Tony Lindgren
> Sent: Thursday, September 02, 2010 9:50 PM
> To: Russell King - ARM Linux
> Cc: linux-omap at vger.kernel.org; linux-arm-kernel at lists.infradead.org;
> Bryan Wu; Will Deacon
> Subject: [PATCH 2/6] ARM: Use SMP and UP macros for cacheflush
>
> From 16c866489613ef8ea9d28ecf861f5a7ff4d60377 Mon Sep 17 00:00:00 2001
> From: Tony Lindgren <tony@atomide.com>
> Date: Thu, 2 Sep 2010 08:20:02 -0700
> Subject: [PATCH 2/6] ARM: Use SMP and UP macros for cacheflush
>
> Use SMP and UP macros for cacheflush. Note that __flush_icache_all
> currently won't work properly on ARMv7 SMP if support for ARMv6 is
> compiled in.
>
> Signed-off-by: Tony Lindgren <tony@atomide.com>
> ---
> arch/arm/include/asm/cacheflush.h | 7 +++++--
> 1 files changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/include/asm/cacheflush.h
> b/arch/arm/include/asm/cacheflush.h
> index 4656a24..09a893e 100644
> --- a/arch/arm/include/asm/cacheflush.h
> +++ b/arch/arm/include/asm/cacheflush.h
> @@ -16,6 +16,7 @@
> #include <asm/shmparam.h>
> #include <asm/cachetype.h>
> #include <asm/outercache.h>
> +#include <asm/smp_plat.h>
>
> #define CACHE_COLOUR(vaddr) ((vaddr & (SHMLBA - 1)) >> PAGE_SHIFT)
>
> @@ -372,8 +373,10 @@ static inline void __flush_icache_all(void)
> extern void v6_icache_inval_all(void);
> v6_icache_inval_all();
> #elif defined(CONFIG_SMP) && __LINUX_ARM_ARCH__ >= 7
> - asm("mcr p15, 0, %0, c7, c1, 0 @ invalidate I-cache inner
> shareable\n"
> - :
> + asm( \
> + SMP(mcr p15, 0, %0, c7, c1, 0 @ inv I-cache inner shareable)
> \
> + UP(mcr p15, 0, %0, c7, c5, 0 @ invalidate I-cache) \
> + : \
> : "r" (0));
> #else
> asm("mcr p15, 0, %0, c7, c5, 0 @ invalidate I-cache\n"
Since UP/SMP both cases are handled, the above patch can be something like this now...
diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h
index 9792a71..ebdff42 100644
--- a/arch/arm/include/asm/cacheflush.h
+++ b/arch/arm/include/asm/cacheflush.h
@@ -16,6 +16,7 @@
#include <asm/shmparam.h>
#include <asm/cachetype.h>
#include <asm/outercache.h>
+#include <asm/smp_plat.h>
#define CACHE_COLOUR(vaddr) ((vaddr & (SHMLBA - 1)) >> PAGE_SHIFT)
@@ -394,13 +395,11 @@ static inline void __flush_icache_all(void)
#ifdef CONFIG_ARM_ERRATA_411920
extern void v6_icache_inval_all(void);
v6_icache_inval_all();
-#elif defined(CONFIG_SMP) && __LINUX_ARM_ARCH__ >= 7
- asm("mcr p15, 0, %0, c7, c1, 0 @ invalidate I-cache inner shareable\n"
- :
- : "r" (0));
#else
- asm("mcr p15, 0, %0, c7, c5, 0 @ invalidate I-cache\n"
- :
+ asm( \
+ SMP(mcr p15, 0, %0, c7, c1, 0 @ inv I-cache inner shareable) \
+ UP(mcr p15, 0, %0, c7, c5, 0 @ invalidate I-cache) \
+ : \
: "r" (0));
#endif
}
--
1.6.0.4
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 2/6] ARM: Use SMP and UP macros for cacheflush
2010-09-03 11:57 ` Shilimkar, Santosh
@ 2010-09-04 10:57 ` Russell King - ARM Linux
2010-09-04 11:01 ` Shilimkar, Santosh
0 siblings, 1 reply; 5+ messages in thread
From: Russell King - ARM Linux @ 2010-09-04 10:57 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Sep 03, 2010 at 05:27:25PM +0530, Shilimkar, Santosh wrote:
> Since UP/SMP both cases are handled, the above patch can be something
> like this now...
No - this results in the instruction used for ARMv6 SMP systems being
changed to the ARMv7 instruction, which probably won't work.
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 2/6] ARM: Use SMP and UP macros for cacheflush
2010-09-04 10:57 ` Russell King - ARM Linux
@ 2010-09-04 11:01 ` Shilimkar, Santosh
0 siblings, 0 replies; 5+ messages in thread
From: Shilimkar, Santosh @ 2010-09-04 11:01 UTC (permalink / raw)
To: linux-arm-kernel
> -----Original Message-----
> From: Russell King - ARM Linux [mailto:linux at arm.linux.org.uk]
> Sent: Saturday, September 04, 2010 4:28 PM
> To: Shilimkar, Santosh
> Cc: Tony Lindgren; linux-omap at vger.kernel.org; linux-arm-
> kernel at lists.infradead.org; Bryan Wu; Will Deacon
> Subject: Re: [PATCH 2/6] ARM: Use SMP and UP macros for cacheflush
>
> On Fri, Sep 03, 2010 at 05:27:25PM +0530, Shilimkar, Santosh wrote:
> > Since UP/SMP both cases are handled, the above patch can be something
> > like this now...
>
> No - this results in the instruction used for ARMv6 SMP systems being
> changed to the ARMv7 instruction, which probably won't work.
Ok. I get it now
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2010-09-04 11:01 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
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2010-09-02 15:20 [PATCH 2/6] ARM: Use SMP and UP macros for cacheflush Tony Lindgren
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2010-08-17 14:12 [PATCH 0/4] Hacks to allow booting ARM SMP kernel on UP ARMv7 Tony Lindgren
2010-08-17 15:40 ` Russell King - ARM Linux
2010-08-19 7:38 ` Tony Lindgren
2010-08-19 9:38 ` Bryan Wu
2010-08-19 9:57 ` Tony Lindgren
2010-08-19 10:20 ` Russell King - ARM Linux
2010-08-20 12:06 ` Tony Lindgren
2010-08-30 22:55 ` Tony Lindgren
2010-09-02 13:36 ` Russell King - ARM Linux
2010-09-02 16:16 ` Tony Lindgren
2010-09-02 16:19 ` [PATCH 2/6] ARM: Use SMP and UP macros for cacheflush Tony Lindgren
2010-09-03 11:57 ` Shilimkar, Santosh
2010-09-04 10:57 ` Russell King - ARM Linux
2010-09-04 11:01 ` Shilimkar, Santosh
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