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From: eric.y.miao@gmail.com (Eric Miao)
To: linux-arm-kernel@lists.infradead.org
Subject: PXA270 Errata and Data Cache question
Date: Thu, 29 Apr 2010 07:01:53 +0800	[thread overview]
Message-ID: <q2mf17812d71004281601i7ccc3042n38c4d2c9d8c1907d@mail.gmail.com> (raw)
In-Reply-To: <0470B16A-38C3-403F-A4EB-D1117364BB07@prograde.net>

On Thu, Apr 29, 2010 at 4:20 AM, Michael Cashwell <mboards@prograde.net> wrote:
> On Apr 27, 2010, at 9:51 PM, Eric Miao wrote:
>
>>> So setting that confusion aside, it seems simpler to use an uncached kernel SDRAM VA. In other instances I've used: "arch/arm/mach-pxa/include/mach/hardware.h:#define UNCACHED_ADDR UNCACHED_PHYS_0"
>>> I could extend this to provide an uncached SDRAM page but choosing the VA and PA looks tricky.
>>>
>>> Before I embark on all of that I'm wondering if such an uncached SDRAM mapping might not already exist.
>>
>> Not such mapping as far as I know.
>
> OK, I was being a little dense I think. What I've gone with for the errata workaround is to have the cpufreq-pxa2xx.c module do this in its init function:
>
> /* Errata E88 workaround needs to do uncached reads from SDRAM. ? ? ? ? */
> /* so we allocate a small amount of memory suitable for DMA. ? ? ? ? ? ?*/
> /* since all PXA2xx CPUs have incoherent DMA this forces the ? ? ? ? ? ?*/
> /* UNCACHED attribute on the mapping for the returned address. ? ? ? ? ?*/
> /* it's a bit hinky since DMA has nothing to do with our intent, ? ? ? ?*/
> /* but lacking a more appropirate API this seems to be a reasonable ? ? */
> /* way to do it. these CPUs are not going to reatroactively get ? ? ? ? */
> /* coherent DMA engines and later CPUs neither use this code nor ? ? ? ?*/
> /* suffer from from this errata anyway. ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? */
>
> uncachedSDRAM = (unsigned int *)kmalloc(sizeof(unsigned int), GFP_KERNEL | GFP_DMA);
> if (!uncachedSDRAM)
> ? ? ? ?return -ENOMEM;
>
> I can then dereference that where needed. This seems to work well.
>
> I am planning on submitting all this once I have it wrapped up, but to that end does anyone have significant heartburn over using a DMA allocation this way? If there's a more direct alternative, I'm all ears.
>

I don't think it's a non-cached memory allocated this way.
Use dma_alloc_coherent() instead.

      reply	other threads:[~2010-04-28 23:01 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-04-27 17:36 PXA270 Errata and Data Cache question Michael Cashwell
2010-04-28  1:51 ` Eric Miao
2010-04-28 20:20   ` Michael Cashwell
2010-04-28 23:01     ` Eric Miao [this message]

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