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From: Ferass El Hafidi To: linux-amlogic@lists.infradead.org, Jian Hu , Jerome Brunet , Neil Armstrong , Kevin Hilman , Martin Blumenstingl , Stephen Boyd , Michael Turquette , robh+dt , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Jian Hu , devicetree , linux-clk , linux-amlogic , linux-kernel , linux-arm-kernel , Ronald Claveau Subject: Re: [PATCH 3/3] arm64: dts: amlogic: t7: Add clock controller nodes References: <20260305074328.639993-1-jian.hu@amlogic.com> <20260305074328.639993-4-jian.hu@amlogic.com> In-Reply-To: <20260305074328.639993-4-jian.hu@amlogic.com> Message-ID: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset=utf-8; format=flowed X-Migadu-Flow: FLOW_OUT X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260310_103345_558351_C927162E X-CRM114-Status: UNSURE ( 9.07 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, 05 Mar 2026 07:43, Jian Hu wrote: >Add the required clock controller nodes for Amlogic T7 SoC family: >- SCMI clock controller >- PLL clock controller >- Peripheral clock controller > >Signed-off-by: Jian Hu >--- > arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi | 125 ++++++++++++++++++++ > 1 file changed, 125 insertions(+) > >diff --git a/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi >index 6510068bcff9..6ea1b583b13d 100644 >--- a/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi >+++ b/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi >@@ -6,6 +6,9 @@ > #include > #include > #include "amlogic-t7-reset.h" >+#include >+#include >+#include > > / { > interrupt-parent = <&gic>; >@@ -201,6 +204,33 @@ pwrc: power-controller { > }; > }; > >+ sram@f7042000 { >+ compatible = "mmio-sram"; >+ #address-cells = <1>; >+ #size-cells = <1>; >+ ranges = <0 0x0 0xf7042000 0x100>; >+ >+ scmi_shmem: sram@0 { >+ compatible = "arm,scmi-shmem"; >+ reg = <0x0 0x100>; >+ }; >+ }; >+ >+ firmware { >+ scmi: scmi { >+ compatible = "arm,scmi-smc"; >+ arm,smc-id = <0x820000c1>; >+ shmem = <&scmi_shmem>; >+ #address-cells = <1>; >+ #size-cells = <0>; >+ >+ scmi_clk: protocol@14 { >+ reg = <0x14>; >+ #clock-cells = <1>; >+ }; >+ }; >+ }; >+ > soc { > compatible = "simple-bus"; > #address-cells = <2>; >@@ -224,6 +254,42 @@ apb4: bus@fe000000 { > #size-cells = <2>; > ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>; > >+ clkc_periphs:clock-controller@0 { >+ compatible = "amlogic,t7-peripherals-clkc"; >+ reg = <0x0 0x0 0x0 0x1c8>; >+ #clock-cells = <1>; >+ clocks = <&xtal>, >+ <&scmi_clk CLKID_SYS_CLK>, >+ <&scmi_clk CLKID_FIXED_PLL>, >+ <&scmi_clk CLKID_FCLK_DIV2>, >+ <&scmi_clk CLKID_FCLK_DIV2P5>, >+ <&scmi_clk CLKID_FCLK_DIV3>, >+ <&scmi_clk CLKID_FCLK_DIV4>, >+ <&scmi_clk CLKID_FCLK_DIV5>, >+ <&scmi_clk CLKID_FCLK_DIV7>, >+ <&hifi CLKID_HIFI_PLL>, >+ <&gp0 CLKID_GP0_PLL>, >+ <&gp1 CLKID_GP1_PLL>, >+ <&mpll CLKID_MPLL1>, >+ <&mpll CLKID_MPLL2>, >+ <&mpll CLKID_MPLL3>; >+ clock-names = "xtal", >+ "sys", >+ "fix", >+ "fdiv2", >+ "fdiv2p5", >+ "fdiv3", >+ "fdiv4", >+ "fdiv5", >+ "fdiv7", >+ "hifi", >+ "gp0", >+ "gp1", >+ "mpll1", >+ "mpll2", >+ "mpll3"; >+ }; >+ > reset: reset-controller@2000 { > compatible = "amlogic,t7-reset"; > reg = <0x0 0x2000 0x0 0x98>; >@@ -234,6 +300,7 @@ watchdog@2100 { > compatible = "amlogic,t7-wdt"; > reg = <0x0 0x2100 0x0 0x10>; > clocks = <&xtal>; >+ > }; > > periphs_pinctrl: pinctrl@4000 { >@@ -269,6 +336,64 @@ uart_a: serial@78000 { > status = "disabled"; > }; > >+ gp0:clock-controller@8080 { >+ compatible = "amlogic,t7-gp0-pll"; >+ reg = <0x0 0x8080 0x0 0x20>; >+ clocks = <&scmi_clk CLKID_TOP_PLL_OSC>; >+ clock-names = "in0"; >+ #clock-cells = <1>; >+ }; I would separate `gp0:` and `clock-controller@8080` with a space, like so: gp0: clock-controller@8080 { Same for the others below (and `clkc_periphs:clock-controller@0` above). >+ >+ gp1:clock-controller@80c0 { >+ compatible = "amlogic,t7-gp1-pll"; >+ reg = <0x0 0x80c0 0x0 0x14>; >+ clocks = <&scmi_clk CLKID_TOP_PLL_OSC>; >+ clock-names = "in0"; >+ #clock-cells = <1>; >+ }; >+ >+ hifi:clock-controller@8100 { >+ compatible = "amlogic,t7-hifi-pll"; >+ reg = <0x0 0x8100 0x0 0x20>; >+ clocks = <&scmi_clk CLKID_TOP_PLL_OSC>; >+ clock-names = "in0"; >+ #clock-cells = <1>; >+ }; >+ >+ pcie:clock-controller@8140 { >+ compatible = "amlogic,t7-pcie-pll"; >+ reg = <0x0 0x8140 0x0 0x1c>; >+ clocks = <&scmi_clk CLKID_PCIE_OSC>; >+ clock-names = "in0"; >+ #clock-cells = <1>; >+ }; >+ >+ mpll:clock-controller@8180 { >+ compatible = "amlogic,t7-mpll"; >+ reg = <0x0 0x8180 0x0 0x28>; >+ clocks = <&scmi_clk CLKID_FIXED_PLL_DCO>; >+ clock-names = "in0"; >+ #clock-cells = <1>; >+ }; >+ >+ hdmi:clock-controller@81c0 { >+ compatible = "amlogic,t7-hdmi-pll"; >+ reg = <0x0 0x81c0 0x0 0x20>; >+ clocks = <&scmi_clk CLKID_HDMI_PLL_OSC>; >+ clock-names = "in0"; >+ #clock-cells = <1>; >+ }; >+ >+ mclk:clock-controller@8300 { >+ compatible = "amlogic,t7-mclk-pll"; >+ reg = <0x0 0x8300 0x0 0x18>; >+ clocks = <&scmi_clk CLKID_MCLK_PLL_OSC>, >+ <&xtal>, >+ <&scmi_clk CLKID_FCLK_50M>; >+ clock-names = "in0", "in1", "in2"; >+ #clock-cells = <1>; >+ }; >+ > sec_ao: ao-secure@10220 { > compatible = "amlogic,t7-ao-secure", > "amlogic,meson-gx-ao-secure", >-- >2.47.1 > > Best regards, Ferass >_______________________________________________ >linux-amlogic mailing list >linux-amlogic@lists.infradead.org >http://lists.infradead.org/mailman/listinfo/linux-amlogic