Re: [PATCH 3/3] arm64: zynqmp: Add EBDEE EdgeBoard FZ3A development board

[Pufan Jin <2254650260@qq.com>]

On 2026/10/5 05:25, Andrew Lunn wrote:
>> +&gem3 {
>> +	clocks = <&lpd_lsbus>, <&zynqmp_clk GEM3_REF>,
>> +		 <&zynqmp_clk GEM3_TX>, <&zynqmp_clk GEM3_RX>,
>> +		 <&zynqmp_clk GEM_TSU>;
>> +	phy-mode = "rgmii-id";
>> +	status = "okay";
>> +};
> No MDIO bus? No phy-handle?
>
>     Andrew
Hi Andrew,

Thanks for the review. In v1, the mdio node and phy-handle were omitted,
relying on the Cadence MACB driver's MDIO auto-probing, which was 
incomplete.

According to the hardware schematics and live register readback, the board
has an on-board Micrel KSZ9031RNX Gigabit PHY strapped to MDIO address 1
(PHYAD[2:0] = 001b, PHY ID 0x00221620).

In v2, I have added an explicit mdio bus node with the PHY at reg = <1>:

```
     mdio {
         phy0: ethernet-phy@1 {
             reg = <1>;
             compatible = "ethernet-phy-id0022.1620";
         };
     };
```

and referenced it with phy-handle = <&phy0> under phy-mode = "rgmii-id".

This has been validated on physical hardware at 1000 Mbps Full Duplex
with zero CRC/frame errors.

Best regards,
Pufan Jin