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From: 914059751@qq.com (胡杨树)
To: linux-arm-kernel@lists.infradead.org
Subject: Query abut 2410 LCD configuration
Date: Tue, 9 Mar 2010 08:58:00 +0800	[thread overview]
Message-ID: <tencent_4B106ACE28F95B4E19D92218@qq.com> (raw)

Im wondering these values DOES make any sense ?
 
 
------------------ Original ------------------
From:  "gianluca"<gianlucarenzi@eurekelettronica.it>;
Date:  Mon, Mar 8, 2010 10:32 PM
To:  "???"<914059751@qq.com>; 
Cc:  "linux-arm-kernel"<linux-arm-kernel@lists.infradead.org>; 
Subject:  Re: Query abut 2410 LCD configuration

 
 ??? wrote:
> Hi all:)
> 
>       In arch/arm/mach-s3c2410/include/mach/fb.h, struct s3c2410fb_display defines lcd configurations, 
>       Can figure out where does these values following pixclock come from?
> 
> 
> /* LCD description */
> struct s3c2410fb_display {
>     /* LCD type */
>     unsigned type;
> 
>     /* Screen size */
>     unsigned short width;
>     unsigned short height;
> 
>     /* Screen info */
>     unsigned short xres;
>     unsigned short yres;
>     unsigned short bpp;
> 
>     unsigned pixclock;        /* pixclock in picoseconds */
>     unsigned short left_margin;  /* value in pixels (TFT) or HCLKs (STN) */
>     unsigned short right_margin; /* value in pixels (TFT) or HCLKs (STN) */
>     unsigned short hsync_len;    /* value in pixels (TFT) or HCLKs (STN) */
>     unsigned short upper_margin;    /* value in lines (TFT) or 0 (STN) */
>     unsigned short lower_margin;    /* value in lines (TFT) or 0 (STN) */
>     unsigned short vsync_len;    /* value in lines (TFT) or 0 (STN) */
> 
>     /* lcd configuration registers */
>     unsigned long    lcdcon5;
> };
> 
> 
> 
>       Take LQ080V3DG01 for example,
> 
> -----------------             arch/arm/mach-s3c2410/mach-qt2410.c     ----------------------------
>         /* Configuration for 640x480 SHARP LQ080V3DG01 */
>         .lcdcon5 = S3C2410_LCDCON5_FRM565 |
>                S3C2410_LCDCON5_INVVLINE |
>                S3C2410_LCDCON5_INVVFRAME |
>                S3C2410_LCDCON5_PWREN |
>                S3C2410_LCDCON5_HWSWP,
> 
>         .type        = S3C2410_LCDCON1_TFT,
>         .width        = 640,
>         .height        = 480,
> 
>         .pixclock    = 40000, /* HCLK/4 */
>         .xres        = 640,
>         .yres        = 480,
>         .bpp        = 16,
>         .left_margin    = 44,
>         .right_margin    = 116,
>         .hsync_len    = 96,
>         .upper_margin    = 19,
>         .lower_margin    = 11,
>         .vsync_len    = 15,
>     },
> 
> pixclock is 40000 in picoseconds , 1/(40000*10^-12) = 25MHz, that correspond with LQ080V3DG01 clock frequency ranges.
> 
> wondering where does the rest of values come from?
> any tips/ideas would be appreciated!
Maybe the LQ080... datasheet? or other platform driver with the same LCD 
configuration, or they simply came from tests.


Regards,
-- 
            ,,,
           (o o)
======oOO==(_)==OOo======

Gianluca Renzi
R&D
phone: +39.0542.609120
fax:   +39.0542.609212

       .oooO  Oooo.
======(   )==(   )=======
        \ (    ) /
         \_)  (_/

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             reply	other threads:[~2010-03-09  0:58 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-03-09  0:58 胡杨树 [this message]
2010-03-12 10:38 ` Query abut 2410 LCD configuration gianluca
  -- strict thread matches above, loose matches on Subject: below --
2010-03-08 14:24 胡杨树
2010-03-08 14:32 ` gianluca
2010-11-24  0:34 ` Ben Dooks

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