[PATCH v6 4/4] arm64: dts: rockchip: Enable CAN controller on RK3588-Tiger-Haikou

[Cunhao Lu <1579567540@qq.com>]

From: Heiko Stuebner <heiko.stuebner@cherry.de>

CAN0 is piped through the Q7 connector to the CAN header on the Haikou
baseboard, so enable support for it there.

At least on RK3588 Tiger, the CAN clocks default to 99 MHz, limiting
usable CAN bitrates without skew. The RK3568 errata documentation
mentions 300 MHz as the default frequency, so request the same rate to
allow more bitrates.

The CAN clock setup is common to the Tiger SoM regardless of which
carrier board exposes CAN0, so place it in rk3588-tiger.dtsi. Keep CAN0
disabled by default and enable it in rk3588-tiger-haikou.dts, where the
carrier board routes it to a transceiver.

Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Signed-off-by: Cunhao Lu <1579567540@qq.com>
---
 arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou.dts | 4 ++++
 arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi       | 5 +++++
 2 files changed, 9 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou.dts b/arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou.dts
index 873fbeb8daa1..6c57c9f54a30 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou.dts
@@ -155,6 +155,10 @@ vddd_audio_1v6: regulator-vddd-audio-1v6 {
 	};
 };
 
+&can0 {
+	status = "okay";
+};
+
 &combphy2_psu {
 	status = "okay";
 };
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi
index 139f70e7bbd9..161c89c62bcd 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi
@@ -90,6 +90,11 @@ vcc5v0_sys: regulator-vcc5v0-sys {
 	};
 };
 
+&can0 {
+	assigned-clocks = <&cru CLK_CAN0>;
+	assigned-clock-rates = <300000000>;
+};
+
 &cpu_b0 {
 	cpu-supply = <&vdd_cpu_big0_s0>;
 };

-- 
2.34.1