From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AF411C43458 for ; Wed, 8 Jul 2026 17:58:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type:MIME-Version: Message-ID:Date:References:In-Reply-To:Subject:Cc:To:From:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=2zcJcB1E4eAZy0egEbo5b49ra1AlE1ZZgAl0aBZPFpg=; b=XviROHm9L+ZZHZ4BZD3u5+alN0 vMG/TlfRIAdz6xzwxnTQl4B5UdMdvkHdp30OL8InkeGQ8JRUAkwysV2OiZoCC3NANZeZi4KO/+VnC cNXAErMDsjXmnZpfHYm5yzVL/Al14PCLf1zkPtNysswfH8gWP3DrZNUIhsUNtGVIcaOTSUSjtqwWS vMREHkYxx7GemKg1yuKKjHAonN4Q7QnZ+LXUrV8Si9Y0+L8RFb3zTw2Aw7cwarGgEZi0mKU57z+pr 9tMrlEgQU++cXhNaZWP+FSNBkLVKe0q3lxLKvrnjU0VeZpFqNY1aNr7nDgbLvaJBSbozpESjH8gca 8OODyQkg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1whWXY-000000008bJ-244F; Wed, 08 Jul 2026 17:58:32 +0000 Received: from sea.source.kernel.org ([2600:3c0a:e001:78e:0:1991:8:25]) by bombadil.infradead.org with esmtps (Exim 4.99.1 #2 (Red Hat Linux)) id 1whWXW-000000008b6-2im3 for linux-arm-kernel@lists.infradead.org; Wed, 08 Jul 2026 17:58:30 +0000 Received: from smtp.kernel.org (quasi.space.kernel.org [100.103.45.18]) by sea.source.kernel.org (Postfix) with ESMTP id 7B9D940279; Wed, 8 Jul 2026 17:58:29 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9DFE91F000E9; Wed, 8 Jul 2026 17:58:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1783533509; bh=2zcJcB1E4eAZy0egEbo5b49ra1AlE1ZZgAl0aBZPFpg=; h=From:To:Cc:Subject:In-Reply-To:References:Date; b=lUFCGVvhi3r0g2REAtCb2IGA8CZvBtpISzpqNOsLlIz4oC8RYsx/4BDzxBWlKpED0 OO0H8pEE+Rj/gvkRHSvopojk6+7GJ2AVOWtst9fH1KbISbjRghLiVKG8hjeEoo2NJL 1pONN4spCjOkHAEVviRtqhHebsdb8FkdHq+W9mwMHVu3D2rDo+PIliDI8dLOzCpavH 2v63vsnLIDMQkmI7iMKzYlLlawSHemKEODU9IgIdU5HL7fCECve8y+XTvAEm18oYQ/ fjk+++bhVL1mK2ZtC2q+a75eR0XtyKKWF5XVAIEO0u/AFkjmd4VWUqV8Us3U8DJG1R Qf80NCztIqmrQ== X-Mailer: emacs 30.2 (via feedmail 11-beta-1 I) From: Aneesh Kumar K.V To: Catalin Marinas Cc: iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, Robin Murphy , Marek Szyprowski , Will Deacon , Marc Zyngier , Steven Price , Suzuki K Poulose , Jiri Pirko , Jason Gunthorpe , Mostafa Saleh , Petr Tesarik , Alexey Kardashevskiy , Dan Williams , Xu Yilun , linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, Madhavan Srinivasan , Michael Ellerman , Nicholas Piggin , "Christophe Leroy (CS GROUP)" , Alexander Gordeev , Gerald Schaefer , Heiko Carstens , Vasily Gorbik , Christian Borntraeger , Sven Schnelle , x86@kernel.org, Jiri Pirko , Michael Kelley Subject: Re: [PATCH v7 16/22] dma-direct: make dma_direct_map_phys() honor DMA_ATTR_CC_SHARED In-Reply-To: References: <20260701054926.825925-1-aneesh.kumar@kernel.org> <20260701054926.825925-17-aneesh.kumar@kernel.org> Date: Wed, 08 Jul 2026 23:28:14 +0530 Message-ID: MIME-Version: 1.0 Content-Type: text/plain X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Catalin Marinas writes: > On Wed, Jul 01, 2026 at 11:19:20AM +0530, Aneesh Kumar K.V (Arm) wrote: >> diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c >> index 97987f850a33..acf67c7064db 100644 >> --- a/arch/arm64/mm/init.c >> +++ b/arch/arm64/mm/init.c >> @@ -338,10 +338,8 @@ void __init arch_mm_preinit(void) >> unsigned int flags = SWIOTLB_VERBOSE; >> bool swiotlb = max_pfn > PFN_DOWN(arm64_dma_phys_limit); >> >> - if (is_realm_world()) { >> + if (is_realm_world()) >> swiotlb = true; >> - flags |= SWIOTLB_FORCE; >> - } > > For this part: > > Reviewed-by: Catalin Marinas > >> diff --git a/kernel/dma/direct.h b/kernel/dma/direct.h >> index e05dc7649366..f3fc28f352ba 100644 >> --- a/kernel/dma/direct.h >> +++ b/kernel/dma/direct.h >> @@ -88,37 +88,40 @@ static inline dma_addr_t dma_direct_map_phys(struct device *dev, >> { >> dma_addr_t dma_addr; >> >> + /* >> + * For a device requiring unencrypted DMA, MMIO memory is treated >> + * as shared by default. >> + */ >> + if (force_dma_unencrypted(dev) && (attrs & DMA_ATTR_MMIO)) >> + attrs |= DMA_ATTR_CC_SHARED; >> + >> if (is_swiotlb_force_bounce(dev)) { >> - if (!(attrs & DMA_ATTR_CC_SHARED)) { >> - if (attrs & (DMA_ATTR_MMIO | DMA_ATTR_REQUIRE_COHERENT)) >> - return DMA_MAPPING_ERROR; >> + if (attrs & (DMA_ATTR_MMIO | DMA_ATTR_REQUIRE_COHERENT)) >> + return DMA_MAPPING_ERROR; >> >> - return swiotlb_map(dev, phys, size, dir, attrs); >> - } >> - } else if (attrs & DMA_ATTR_CC_SHARED) { >> - return DMA_MAPPING_ERROR; >> + return swiotlb_map(dev, phys, size, dir, attrs); >> } >> >> - if (attrs & DMA_ATTR_MMIO) { >> - dma_addr = phys; >> - if (unlikely(!dma_capable(dev, dma_addr, size, false, attrs))) >> - goto err_overflow; >> - } else if (attrs & DMA_ATTR_CC_SHARED) { >> + if (attrs & DMA_ATTR_CC_SHARED) >> dma_addr = phys_to_dma_unencrypted(dev, phys); >> + else >> + dma_addr = phys_to_dma_encrypted(dev, phys); > > For AMD/SME, on host with memory encryption we now end up setting the C > bit for DMA_ATTR_MMIO. This is fine for RAM but not sure whether > some other MMIO bus understands this attribute. Maybe we should stick to > something like __phys_to_dma() for the !CC_SHARED && MMIO path. Or, > since this is not universally defined, just use the old dma_addr = phys > if MMIO and ignore any unlikely DMA offsets. > Considering for AMD/SME system an unencrypted dma addr is one without C bit, will this be good? /* * For host memory encryption and device requiring unencrypted DMA, * MMIO memory is treated as shared by default. */ if (attrs & DMA_ATTR_MMIO) { if (cc_platform_has(CC_ATTR_HOST_MEM_ENCRYPT) || force_dma_unencrypted(dev)) attrs |= DMA_ATTR_CC_SHARED; } > > In the other case, for an arm CCA guest, if the MMIO is shared we end up > setting the shared attribute but that's fine, it's only an IPA address. > > -- > Catalin -aneesh