From mboxrd@z Thu Jan 1 00:00:00 1970 From: mans@mansr.com (=?iso-8859-1?Q?M=E5ns_Rullg=E5rd?=) Date: Fri, 27 Jan 2012 12:56:35 +0000 Subject: oprofile and ARM A9 hardware counter In-Reply-To: <20120127121311.GB2347@mudshark.cambridge.arm.com> (Will Deacon's message of "Fri, 27 Jan 2012 12:13:11 +0000") References: <20120127121311.GB2347@mudshark.cambridge.arm.com> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Will Deacon writes: > Hi guys, > > On Sat, Jan 21, 2012 at 09:16:57AM +0000, stephane eranian wrote: >> On Sat, Jan 21, 2012 at 4:25 AM, Ming Lei wrote: >> > On Fri, Jan 20, 2012 at 9:47 PM, stephane eranian >> > wrote: >> >> Started afresh from: >> >> >> >> 90a4c0f uml: fix compile for x86-64 >> >> >> >> And added 3, 4, 5, 6: >> >> 603c316 arm: omap4: pmu: support runtime pm >> >> 4899fbd arm: omap4: support pmu >> >> d737bb1 arm: omap4: create pmu device via hwmod >> >> 4e0259e arm: omap4: hwmod: introduce emu hwmod >> >> >> >> Still no interrupts firing. I am using your .config file. >> >> >> >> My HW: >> >> CPU implementer : 0x41 >> >> CPU architecture: 7 >> >> CPU variant ? ? : 0x1 >> >> CPU part ? ? ? ?: 0xc09 >> >> CPU revision ? ?: 2 >> >> >> >> Hardware ? ? ? ?: OMAP4 Panda board >> >> Revision ? ? ? ?: 0020 >> >> >> >> There must be something I am missing here. > > Did this lead anywhere in the end? It seems as though Ming Lei has a working > setup but Stephane is unable to replicate it, despite applying the necessary > patches and trying an updated bootloader. With the patches listed above plus the one in [1], I get PMU interrupts. However, unless I restrict the profiled process to one CPU (taskset 1 perf record ...), I get a panic in armpmu_event_update() with the 'event' argument being null when called from armv7pmu_handle_irq(). [1] http://article.gmane.org/gmane.linux.ports.arm.omap/69696 -- M?ns Rullg?rd mans at mansr.com