From: eric.y.miao@gmail.com (Eric Miao)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 01/10] [ARM] pxa: extend to support 96 IRQs
Date: Wed, 5 May 2010 09:28:18 +0800 [thread overview]
Message-ID: <z2qf17812d71005041828ocd0ff0cfn33bf32ce9c1d46c3@mail.gmail.com> (raw)
In-Reply-To: <j2l771cded01004290115kf0c7b08m8dface1967d26752@mail.gmail.com>
On Thu, Apr 29, 2010 at 4:15 PM, Haojian Zhuang
<haojian.zhuang@gmail.com> wrote:
> From ea9bcffc52bb7ee542c3615530e1c8e87100c884 Mon Sep 17 00:00:00 2001
> From: Haojian Zhuang <haojian.zhuang@marvell.com>
> Date: Thu, 29 Apr 2010 10:22:12 -0400
> Subject: [PATCH] [ARM] pxa: extend to support 96 IRQs
>
> Extend to support 96 IRQs for PXA950.
>
> Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
> ---
> ?arch/arm/mach-pxa/irq.c ? ?| ? ?9 ++++++---
> ?arch/arm/mach-pxa/pxa3xx.c | ? ?2 +-
> ?2 files changed, 7 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c
> index 1beb40f..bb5a0c7 100644
> --- a/arch/arm/mach-pxa/irq.c
> +++ b/arch/arm/mach-pxa/irq.c
> @@ -27,9 +27,12 @@
>
> ?#define MAX_INTERNAL_IRQS ? ? ?128
>
> -#define IRQ_BIT(n) ? ? (((n) - PXA_IRQ(0)) & 0x1f)
> -#define _ICMR(n) ? ? ? (*((((n) - PXA_IRQ(0)) & ~0x1f) ? &ICMR2 : &ICMR))
> -#define _ICLR(n) ? ? ? (*((((n) - PXA_IRQ(0)) & ~0x1f) ? &ICLR2 : &ICLR))
> +#define _IDX(n) ? ? ? ? ? ? ? ?((n) - PXA_IRQ(0))
> +#define IRQ_BIT(n) ? ? (_IDX(n) & 0x1f)
> +#define _ICMR(n) ? ? ? (*((_IDX(n) < 32) ? &ICMR ? ? ? ? ? ? ? ? ? ? ? \
> + ? ? ? ? ? ? ? ? ? ? ? : ((_IDX(n) < 64) ? &ICMR2 : &ICMR3)))
> +#define _ICLR(n) ? ? ? (*((_IDX(n) < 32) ? &ICLR ? ? ? ? ? ? ? ? ? ? ? \
> + ? ? ? ? ? ? ? ? ? ? ? : ((_IDX(n) < 64) ? &ICLR2 : &ICLR3)))
>
Instead of making these macros more complicated, I'd prefer that
we separate them as three IRQ register banks, with the base I/O
address of these banks in irq_desc.chip_data or some where.
> ?/*
> ?* This is for peripheral IRQs internal to the PXA chip.
> diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
> index 4d7c03e..6285951 100644
> --- a/arch/arm/mach-pxa/pxa3xx.c
> +++ b/arch/arm/mach-pxa/pxa3xx.c
> @@ -581,7 +581,7 @@ void __init pxa3xx_init_irq(void)
> ? ? ? ?value |= (1 << 6);
> ? ? ? ?__asm__ __volatile__("mcr p15, 0, %0, c15, c1, 0\n": :"r"(value));
>
> - ? ? ? pxa_init_irq(56, pxa3xx_set_wake);
> + ? ? ? pxa_init_irq(96, pxa3xx_set_wake);
> ? ? ? ?pxa_init_ext_wakeup_irq(pxa3xx_set_wake);
> ? ? ? ?pxa_init_gpio(IRQ_GPIO_2_x, 2, 127, NULL);
> ?}
> --
> 1.5.6.5
>
next prev parent reply other threads:[~2010-05-05 1:28 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-04-29 8:15 [PATCH 01/10] [ARM] pxa: extend to support 96 IRQs Haojian Zhuang
2010-05-05 1:28 ` Eric Miao [this message]
2010-05-05 7:52 ` Haojian Zhuang
2010-05-05 9:31 ` Eric Miao
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