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[2001:14ba:a0db:1f00::8a5]) by smtp.gmail.com with ESMTPSA id v20-20020a2e9614000000b002b9af8422a8sm2213706ljh.130.2023.07.30.12.56.51 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 30 Jul 2023 12:56:52 -0700 (PDT) Message-ID: <009f05ab-5425-5afe-4381-d8b5df74d1d9@linaro.org> Date: Sun, 30 Jul 2023 22:56:51 +0300 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.13.0 Subject: Re: [PATCH v2 8/8] drm/msm/dpu: move INTF tearing checks to dpu_encoder_phys_cmd_init Content-Language: en-GB To: Marijn Suijten Cc: Rob Clark , Sean Paul , Abhinav Kumar , Stephen Boyd , David Airlie , Daniel Vetter , Bjorn Andersson , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org References: <20230730003518.349197-1-dmitry.baryshkov@linaro.org> <20230730003518.349197-9-dmitry.baryshkov@linaro.org> From: Dmitry Baryshkov In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 30/07/2023 22:52, Marijn Suijten wrote: > On 2023-07-30 03:35:18, Dmitry Baryshkov wrote: >> As the INTF is fixed at the encoder creation time, we can move the >> check whether INTF supports tearchck to dpu_encoder_phys_cmd_init(). >> This function can return an error if INTF doesn't have required feature. >> Performing this check in dpu_encoder_phys_cmd_tearcheck_config() is less >> useful, as this function returns void. >> >> Signed-off-by: Dmitry Baryshkov >> --- >> .../drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 41 +++++++++++-------- >> 1 file changed, 25 insertions(+), 16 deletions(-) >> >> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c >> index 012986cff38c..adbd559a5290 100644 >> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c >> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c >> @@ -325,24 +325,21 @@ static void dpu_encoder_phys_cmd_tearcheck_config( >> unsigned long vsync_hz; >> struct dpu_kms *dpu_kms; >> >> - if (phys_enc->has_intf_te) { >> - if (!phys_enc->hw_intf || >> - !phys_enc->hw_intf->ops.enable_tearcheck) { >> - DPU_DEBUG_CMDENC(cmd_enc, "tearcheck not supported\n"); >> - return; >> - } >> - >> - DPU_DEBUG_CMDENC(cmd_enc, ""); >> - } else { >> - if (!phys_enc->hw_pp || >> - !phys_enc->hw_pp->ops.enable_tearcheck) { >> - DPU_DEBUG_CMDENC(cmd_enc, "tearcheck not supported\n"); >> - return; >> - } >> - >> - DPU_DEBUG_CMDENC(cmd_enc, "pp %d\n", phys_enc->hw_pp->idx - PINGPONG_0); >> + /* >> + * TODO: if/when resource allocation is refactored, move this to a >> + * place where the driver can actually return an error. >> + */ >> + if (!phys_enc->has_intf_te && >> + (!phys_enc->hw_pp || >> + !phys_enc->hw_pp->ops.enable_tearcheck)) { > > We're probably overdoing it here if I request a WARN_ON when has_intf_te > is true while enable_tearcheck is also non-NULL? > >> + DPU_DEBUG_CMDENC(cmd_enc, "tearcheck not supported\n"); >> + return; >> } >> >> + DPU_DEBUG_CMDENC(cmd_enc, "intf %d pp %d\n", >> + phys_enc->hw_intf->idx - INTF_0, >> + phys_enc->hw_pp->idx - PINGPONG_0); > > Note that hw_pp wasn't printed when has_intf_te is true. And it doesn't > seem like that pointer is dereferenced anywhere in that case, perhaps > hw_pp may even be NULL within dpu_encoder_phys_cmd_tearcheck_config() at > some point. No, if I understand correctly. It is only called from _dpu_encoder_phys_cmd_pingpong_config(), which checks for hw_pp. One can not run CMD mode display without a pingpong block anyway. > >> + >> mode = &phys_enc->cached_mode; >> >> dpu_kms = phys_enc->dpu_kms; >> @@ -768,10 +765,22 @@ struct dpu_encoder_phys *dpu_encoder_phys_cmd_init( >> phys_enc->intf_mode = INTF_MODE_CMD; >> cmd_enc->stream_sel = 0; >> >> + if (!phys_enc->hw_intf) { >> + DPU_ERROR_CMDENC(cmd_enc, "no INTF provided\n"); >> + > > No need for this newline? I just usually insert an empty line before return. Let's remove it. > >> + return ERR_PTR(-EINVAL); >> + } >> + >> /* DPU before 5.0 use PINGPONG for TE handling */ >> if (phys_enc->dpu_kms->catalog->mdss_ver->core_major_ver >= 5) >> phys_enc->has_intf_te = true; >> >> + if (phys_enc->has_intf_te && !phys_enc->hw_intf->ops.enable_tearcheck) { >> + DPU_ERROR_CMDENC(cmd_enc, "tearcheck not supported\n"); >> + > > Same here? > > - Marijn > >> + return ERR_PTR(-EINVAL); >> + } >> + >> atomic_set(&cmd_enc->pending_vblank_cnt, 0); >> init_waitqueue_head(&cmd_enc->pending_vblank_wq); >> >> -- >> 2.39.2 >> -- With best wishes Dmitry