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([2a05:6e02:1041:c10:5dfc:3995:22ce:d286]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4854e2537c3sm441177245e9.15.2026.03.16.03.51.39 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 16 Mar 2026 03:51:39 -0700 (PDT) Message-ID: <00a7ea43-e527-47f3-bcd4-285b7ba37a2e@oss.qualcomm.com> Date: Mon, 16 Mar 2026 11:51:38 +0100 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] cpuidle: Deny idle entry when CPU already have IPI interrupt pending To: Christian Loehle , Maulik Shah , "Rafael J. Wysocki" , Daniel Lezcano , Ulf Hansson Cc: linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org References: <20260316-cpuidle_ipi-v1-1-d0ff6350f4e2@oss.qualcomm.com> <39ffe4f6-5716-400d-963b-06675a727225@arm.com> <3d56b0db-7ece-48f7-ba59-fb1679aee804@arm.com> Content-Language: en-US From: Daniel Lezcano In-Reply-To: <3d56b0db-7ece-48f7-ba59-fb1679aee804@arm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: sMKeWcBNlYA7GIzwQlF23PFtOyaPs5Bc X-Authority-Analysis: v=2.4 cv=QOxlhwLL c=1 sm=1 tr=0 ts=69b7e0bd cx=c_pps a=50t2pK5VMbmlHzFWWp8p/g==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=eoimf2acIAo5FJnRuUoq:22 a=VwQbUJbxAAAA:8 a=KKAkSRfTAAAA:8 a=J8AoiNgv1xfB8hOpzzcA:9 a=QEXdDO2ut3YA:10 a=IoWCM6iH3mJn3m4BftBB:22 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-ORIG-GUID: sMKeWcBNlYA7GIzwQlF23PFtOyaPs5Bc X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzE2MDA4MiBTYWx0ZWRfX38Bpkw/2BTcJ YnFWxBRenYOddBzqszMJ3cdehXbDkwzYqLjuJJ2IexkwtEsaz5xk6O55mzvRFs52Id1Opd6c+QE Ckm3ss4AqDWLyQkOwMALYmZHW0YEwE5ew5/qqbAU9vUn9dbIXzDGjRQ4VRM60q7nCdjpWQQNTwp FIuqi6Yqm9/QUexyg91uVPGCjekTIt4NXNNwyJNqsu0wlDDrrgJ+kQ0Y14N6mM2Jl4D+4HCHcPS cqzpmZ3zdzJyaxdNELa+6GhIa6knM4A8hziGwZNhH6WkXXSa6S9zLaKgkow9TkiV8YoirU6LBuH Cc7yDImMFS+ltch3LNwVX3SDAacJklrq+PR8jIOjNeks7v9I/VF4WaeSsKQbkWl8c2vbJvRYQ0g f85ks7LMUDI4wEZyIOtFsd9HA27AD5FJEUUAykynZDmamYKyx6jCAjn1qDlLVcQfX7D4jsV8SCU XgGkZx4oH+vuh8Gzcig== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-16_04,2026-03-13_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 phishscore=0 impostorscore=0 lowpriorityscore=0 malwarescore=0 bulkscore=0 suspectscore=0 clxscore=1015 adultscore=0 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2603160082 On 3/16/26 10:50, Christian Loehle wrote: [ ... ] >>> So we already do a per-CPU IPI need_resched() check in the idle >>> path. >> >> The need_resched() is not the same check. Here the interrupts are >> off, the test check if there is a pending IPI before entering the >> sleep routine which will in any case abort because of it. This >> check saves the costs related to preparing entering the idle >> state, the call to the firmware and the rollback. Those add an >> overhead in terms of latency and energy for nothing. As stated in >> the description, this ultimate check before going idle was >> introduced also for the cluster idle state and showed a >> significant improvement [1]. >> >> [1] https://lore.kernel.org/all/20251105095415.17269-1- >> ulf.hansson@linaro.org/ > So I didn't mean this as "it's unnecessary", but it did make me > question how big the "performance" impact of this really is, in > particular for per-CPU idle states (i.e. at most sleep / powerdown > for you?) From a per CPU perspective, it is hard to say. It really depends on the workload, the number of CPUs and the correctness of the governor prediction. I would say the higher the number of CPUs, the higher the probability to receive an IPI, the lesser the accuracy of the governor [1] and the more visible the improvement of this change is. Maulik did some benchmarking with glmark2 and showed an improvement. > But if this is only about cluster states (The original > patch wasn't really clear on that?) then one issue is that the non- > pmdomain case (e.g. psci PC-mode) we don't actually know what a > cluster is and therefore which CPUs to check for pending IPIs, > right? Ulf changes is for platforms, usually Snapdragon, where the kernel has a knowledge of the topology and uses the PSCI-OSI (IIRC). So the kernel is in charge of the last-man-standing for the group of CPUs belonging to the same cluster. It has all the needed information for this specific configuration. In the case of the PSCI-PC, the firmware is in charge of the cluster idling and AFAICT it does a test for pending IRQ / IPI. -- Daniel [1] IPI prediction is not possible because it fully depends on the scheduler, so on the behavior of the tasks.