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[83.9.29.16]) by smtp.gmail.com with ESMTPSA id w21-20020ac254b5000000b004dc7fae3cfcsm545559lfk.75.2023.03.14.14.25.23 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 14 Mar 2023 14:25:24 -0700 (PDT) Message-ID: <09b49716-fa77-710c-92ec-3c0d7c154bc3@linaro.org> Date: Tue, 14 Mar 2023 22:25:22 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.8.0 Subject: Re: [PATCH 2/2] arm64: dts: qcom: Add base qrb4210-rb2 board dts Content-Language: en-US To: Bhupesh Sharma , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org Cc: agross@kernel.org, andersson@kernel.org, linux-kernel@vger.kernel.org, bhupesh.linux@gmail.com, robh+dt@kernel.org, krzysztof.kozlowski@linaro.org References: <20230314210828.2049720-1-bhupesh.sharma@linaro.org> <20230314210828.2049720-3-bhupesh.sharma@linaro.org> From: Konrad Dybcio In-Reply-To: <20230314210828.2049720-3-bhupesh.sharma@linaro.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 14.03.2023 22:08, Bhupesh Sharma wrote: > Add DTS for Qualcomm qrb4210-rb2 board which uses SM4250 SoC. > > This adds debug uart, emmc, uSD and tlmm support along with > regulators found on this board. > > Also defines the 'xo_board' and 'sleep_clk' frequencies for > this board. > > Signed-off-by: Bhupesh Sharma > --- [...] > +#include This SoC does not feature RPMh, drop. > +#include "sm4250.dtsi" > + > +/ { > + model = "Qualcomm Technologies, Inc. QRB4210 RB2"; > + compatible = "qcom,qrb4210-rb2", "qcom,sm4250"; Please add a qcom,qrb4210 between the board-specific and the common SoC compatibles so that we can address QRB-specific quirks if such ever arise. > + > + aliases { > + serial0 = &uart4; > + }; > + [...] > +&xo_board { > + clock-frequency = <19200000>; > +}; > + > +&sleep_clk { > + clock-frequency = <32000>; > +}; Out of alphanumerical order > + > +&qupv3_id_0 { > + status = "okay"; > +}; > + > +&uart4 { > + status = "okay"; > +}; > + > +&rpm_requests { Out of alphanumerical order > + regulators-0 { Will there be more PMICs under this node? If not, drop the -0. [...] > +&tlmm { > + gpio-reserved-ranges = <37 5>, <43 2>, <47 1>, > + <49 1>, <52 1>, <54 1>, > + <56 3>, <61 2>, <64 1>, > + <68 1>, <72 8>, <96 1>; > +}; Are there *really* so many? Does the board refuse to boot if you knock off any of these entries? If so, they probably don't belong here. > + > +&sdhc_1 { > + status = "okay"; Status should go last > + > + vmmc-supply = <&vreg_l24a_2p96>; /* emmc power line */ > + vqmmc-supply = <&vreg_l11a_1p8>; /* emmc vddq */ The comments are not very useful, drop please. > + bus-width = <8>; This is defined in the SoC dtsi already > + no-sdio; > + non-removable; > +}; > + > +&sdhc_2 { > + status = "okay"; > + > + cd-gpios = <&tlmm 88 GPIO_ACTIVE_HIGH>; /* card detect gpio */ > + vmmc-supply = <&vreg_l22a_2p96>; /* Card power line */ > + vqmmc-supply = <&vreg_l5a_2p96>; /* IO line power */ > + bus-width = <4>; > + no-sdio; > + no-emmc; Ditto Konrad > +};