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Wed, 22 Oct 2025 23:35:36 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFqgjoOyq6fjU6mL6BfXgOkMCX6FeequRl8KVaAdKGfOEZukeMq3sizCU9wMfGDVahdPfUBNQ== X-Received: by 2002:a05:6a00:4099:b0:7a2:23cd:418c with SMTP id d2e1a72fcca58-7a223cd42b2mr24458024b3a.3.1761201335575; Wed, 22 Oct 2025 23:35:35 -0700 (PDT) Received: from [10.217.217.147] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7a274dba7c7sm1367091b3a.69.2025.10.22.23.35.30 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 22 Oct 2025 23:35:35 -0700 (PDT) Message-ID: <09e0b94c-2bf6-4147-a831-d3b0724fc418@oss.qualcomm.com> Date: Thu, 23 Oct 2025 12:05:29 +0530 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 4/9] clk: qcom: rpmh: Add support for Kaanapali rpmh clocks To: Dmitry Baryshkov , Jingyi Wang Cc: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Taniya Das , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, aiqun.yu@oss.qualcomm.com, tingwei.zhang@oss.qualcomm.com, trilok.soni@oss.qualcomm.com, yijie.yang@oss.qualcomm.com References: <20250924-knp-clk-v1-0-29b02b818782@oss.qualcomm.com> <20250924-knp-clk-v1-4-29b02b818782@oss.qualcomm.com> Content-Language: en-US From: Taniya Das In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMDE4MDAxOCBTYWx0ZWRfX/1B0DHGGlHhO bGB188VezCwp5yHjJb9BMTyIddHjQk4XG+LWEQQwSjph6ahY9I61EqE594Kn8FDDhmg5oGeGWIp 79o5FUXUXjZPA6gs77SyQ+2sXwm+DDBmBvdFR9d5KIUNqPiLsQV+mALMF6a/Que37wVBNo8HDiM bmR2R8hqyd9fXUVPvG7powqWU6Ej/D5gopBgRI3RlzOFKFyM7czIn8Y1HrsZg+RwVzBvesy0QxC v3c8Uo1ltTDfgPGRBxBtz+KFxx3U7oCYjbTZc9GS/q+xinm/VoB/pzh4vu81Ml1nQj1Ap630rMA LLCayN8J8ZGZuVvORKGVpiYDKGf6ikl1h5BaJXwAMeUvjG0urA1lkzJsr1jEpSDVjTdYSoUub/C KxWjvpd5M7TNqXnGmCTRLRg3lGARnQ== X-Authority-Analysis: v=2.4 cv=G4UR0tk5 c=1 sm=1 tr=0 ts=68f9ccb9 cx=c_pps a=rEQLjTOiSrHUhVqRoksmgQ==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=x6icFKpwvdMA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=QqeVPp7IqxZMZk5Gz7sA:9 a=QEXdDO2ut3YA:10 a=2VI0MkxyNR6bbpdq8BZq:22 X-Proofpoint-GUID: zQAi_V0VowRB6q8hf8rT0g1TCwODAHRC X-Proofpoint-ORIG-GUID: zQAi_V0VowRB6q8hf8rT0g1TCwODAHRC X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-10-22_08,2025-10-22_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 lowpriorityscore=0 malwarescore=0 bulkscore=0 priorityscore=1501 spamscore=0 suspectscore=0 adultscore=0 clxscore=1015 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2510020000 definitions=main-2510180018 On 10/20/2025 4:29 PM, Dmitry Baryshkov wrote: > On Wed, Sep 24, 2025 at 03:58:56PM -0700, Jingyi Wang wrote: >> From: Taniya Das >> >> Add the RPMH clocks present in Kaanapali SoC. >> >> Signed-off-by: Taniya Das >> Signed-off-by: Jingyi Wang >> --- >> drivers/clk/qcom/clk-rpmh.c | 39 +++++++++++++++++++++++++++++++++++++++ >> 1 file changed, 39 insertions(+) >> >> diff --git a/drivers/clk/qcom/clk-rpmh.c b/drivers/clk/qcom/clk-rpmh.c >> index 63c38cb47bc4..6b1f24ee66d5 100644 >> --- a/drivers/clk/qcom/clk-rpmh.c >> +++ b/drivers/clk/qcom/clk-rpmh.c >> @@ -395,6 +395,16 @@ DEFINE_CLK_RPMH_VRM(clk4, _a, "C4A_E0", 1); >> DEFINE_CLK_RPMH_VRM(clk5, _a, "C5A_E0", 1); >> DEFINE_CLK_RPMH_VRM(clk8, _a, "C8A_E0", 1); >> >> +DEFINE_CLK_RPMH_VRM(c1a_e0, _a, "C1A_E0", 1); >> +DEFINE_CLK_RPMH_VRM(c2a_e0, _a, "C2A_E0", 1); > > No. Please make sure that you follow what others have done. > > Why are these clocks named differently from clkN defined above? Sure, I will go back and reuse the clkN definitions. > >> +DEFINE_CLK_RPMH_VRM(c3a_e0, _a2, "C3A_E0", 2); >> +DEFINE_CLK_RPMH_VRM(c4a_e0, _a2, "C4A_E0", 2); >> +DEFINE_CLK_RPMH_VRM(c5a_e0, _a2, "C5A_E0", 2); >> +DEFINE_CLK_RPMH_VRM(c6a_e0, _a2, "C6A_E0", 2); >> +DEFINE_CLK_RPMH_VRM(c7a_e0, _a2, "C7A_E0", 2); >> +DEFINE_CLK_RPMH_VRM(c8a_e0, _a2, "C8A_E0", 2); > > And these should use the same pattern. If the old names are unsuitable > because of the clash between clock names, you can rename them. But > please, be consistent. > Sure, Dmitry, will make the changes. >> +DEFINE_CLK_RPMH_VRM(c11a_e0, _a4, "C11A_E0", 4); > >> + >> DEFINE_CLK_RPMH_BCM(ce, "CE0"); >> DEFINE_CLK_RPMH_BCM(hwkm, "HK0"); >> DEFINE_CLK_RPMH_BCM(ipa, "IP0"); >> @@ -900,6 +910,34 @@ static const struct clk_rpmh_desc clk_rpmh_glymur = { >> .num_clks = ARRAY_SIZE(glymur_rpmh_clocks), >> }; >> >> +static struct clk_hw *kaanapali_rpmh_clocks[] = { >> + [RPMH_CXO_CLK] = &clk_rpmh_bi_tcxo_div2.hw, >> + [RPMH_CXO_CLK_A] = &clk_rpmh_bi_tcxo_div2_ao.hw, >> + [RPMH_DIV_CLK1] = &clk_rpmh_c11a_e0_a4.hw, >> + [RPMH_LN_BB_CLK1] = &clk_rpmh_c6a_e0_a2.hw, >> + [RPMH_LN_BB_CLK1_A] = &clk_rpmh_c6a_e0_a2_ao.hw, >> + [RPMH_LN_BB_CLK2] = &clk_rpmh_c7a_e0_a2.hw, >> + [RPMH_LN_BB_CLK2_A] = &clk_rpmh_c7a_e0_a2_ao.hw, >> + [RPMH_LN_BB_CLK3] = &clk_rpmh_c8a_e0_a2.hw, > -I$(KERNEL_ROOT) \ >> + [RPMH_LN_BB_CLK3_A] = &clk_rpmh_c8a_e0_a2_ao.hw, >> + [RPMH_RF_CLK1] = &clk_rpmh_c1a_e0_a.hw, >> + [RPMH_RF_CLK1_A] = &clk_rpmh_c1a_e0_a_ao.hw, >> + [RPMH_RF_CLK2] = &clk_rpmh_c2a_e0_a.hw, >> + [RPMH_RF_CLK2_A] = &clk_rpmh_c2a_e0_a_ao.hw, >> + [RPMH_RF_CLK3] = &clk_rpmh_c3a_e0_a2.hw, >> + [RPMH_RF_CLK3_A] = &clk_rpmh_c3a_e0_a2_ao.hw, >> + [RPMH_RF_CLK4] = &clk_rpmh_c4a_e0_a2.hw, >> + [RPMH_RF_CLK4] = &clk_rpmh_c4a_e0_a2.hw, >> + [RPMH_RF_CLK5_A] = &clk_rpmh_c5a_e0_a2_ao.hw, >> + [RPMH_RF_CLK5_A] = &clk_rpmh_c5a_e0_a2_ao.hw, >> + [RPMH_IPA_CLK] = &clk_rpmh_ipa.hw, >> +}; >> + >> +static const struct clk_rpmh_desc clk_rpmh_kaanapali = { >> + .clks = kaanapali_rpmh_clocks, >> + .num_clks = ARRAY_SIZE(kaanapali_rpmh_clocks), >> +}; >> + >> static struct clk_hw *of_clk_rpmh_hw_get(struct of_phandle_args *clkspec, >> void *data) >> { >> @@ -990,6 +1028,7 @@ static int clk_rpmh_probe(struct platform_device *pdev) >> >> static const struct of_device_id clk_rpmh_match_table[] = { >> { .compatible = "qcom,glymur-rpmh-clk", .data = &clk_rpmh_glymur}, >> + { .compatible = "qcom,kaanapali-rpmh-clk", .data = &clk_rpmh_kaanapali}, >> { .compatible = "qcom,milos-rpmh-clk", .data = &clk_rpmh_milos}, >> { .compatible = "qcom,qcs615-rpmh-clk", .data = &clk_rpmh_qcs615}, >> { .compatible = "qcom,qdu1000-rpmh-clk", .data = &clk_rpmh_qdu1000}, >> >> -- >> 2.25.1 >> > -- Thanks, Taniya Das