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Thu, 09 Oct 2025 02:52:50 +0000 (GMT) Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA03.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 5992qnQT024105 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 9 Oct 2025 02:52:49 GMT Received: from [10.216.44.193] (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.24; Wed, 8 Oct 2025 19:52:44 -0700 Message-ID: <0c0b6491-1def-d055-b689-2bb99f4306df@quicinc.com> Date: Thu, 9 Oct 2025 08:22:41 +0530 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.15.1 Subject: Re: [PATCH v3 0/5] Introduce "non-pixel" sub node within iris video node Content-Language: en-US To: Krzysztof Kozlowski , Bryan O'Donoghue , Bryan O'Donoghue , Charan Teja Kalla , Bryan O'Donoghue , "Dmitry Baryshkov" CC: Konrad Dybcio , Dikshita Agarwal , Abhinav Kumar , "Mauro Carvalho Chehab" , Rob Herring , Krzysztof Kozlowski , Conor Dooley , , , , References: <7b6db4fa-2f73-376d-4eb3-64c1c7e6cda3@quicinc.com> <4a32bbec-2baf-4210-a7c1-1ddcd45d30c8@oss.qualcomm.com> <4d87d1ca-55b2-426e-aa73-e3fd8c6fe7bd@kernel.org> <10a8ccda-4e27-4b06-9a0e-608d6ade5354@nxsw.ie> <4cb4a92d-2f20-47c7-881e-aadcc6f83aa0@kernel.org> <1516f21e-aee3-42cf-b75e-61142dc9578d@oss.qualcomm.com> <9bae595a-597e-46e6-8eb2-44424fe21db6@linaro.org> <98e6acf8-80d7-4894-b4ce-ce74660722ef@kernel.org> <5085c857-f6e8-4faf-b61a-a9ee562ccf06@kernel.org> From: Vikash Garodia In-Reply-To: <5085c857-f6e8-4faf-b61a-a9ee562ccf06@kernel.org> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMDA4MDEyMSBTYWx0ZWRfXxqvEwSha6c+s tVQH7Uaziht8KROR5d/2vOw0rF9FlLRD+10ENxz9ubmTVwEb3DztoJG27OAmYgXF5lywL4+aFSb sqE6U1PS2jnaoLeQkAXELZG0bAeMPVf14rFPYLzb4PbTO/V2uMI/+GuVh/fRhChJ1PPpsPGXyc7 y1YLSAmA2WmdW19p3xnYEh6krv3QgwqXKGnSGFNghE6ksuz/PHsMWBj7lBgv1OVGPLt+I0nKHTT KEYuN/k4JzO9wm0HY6wmRrBnCxF8SpYWA0nx68ZnfbfwtBex8UwcBz1G80dKOYIvcF4lgPvrOI6 L2LL3iYLnR95CStVPaHh5Ss1P4L02XdcygY48tBy2t0GDk3RnyDNNV1rm31I4s/FA4BNkoOFPxE hLy3YAPeob2UUbZSc5jfr6D4NK+tHA== X-Proofpoint-GUID: sOdZcMY9FRTU-0MvnQewv-pG5vYJFKR7 X-Proofpoint-ORIG-GUID: sOdZcMY9FRTU-0MvnQewv-pG5vYJFKR7 X-Authority-Analysis: v=2.4 cv=SJxPlevH c=1 sm=1 tr=0 ts=68e72382 cx=c_pps a=JYp8KDb2vCoCEuGobkYCKw==:117 a=JYp8KDb2vCoCEuGobkYCKw==:17 a=GEpy-HfZoHoA:10 a=IkcTkHD0fZMA:10 a=x6icFKpwvdMA:10 a=zS5Hj0bcTTPWjRSGFTUA:9 a=QEXdDO2ut3YA:10 a=cPQSjfK2_nFv0Q5t_7PE:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1117,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-10-09_01,2025-10-06_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 suspectscore=0 impostorscore=0 spamscore=0 phishscore=0 clxscore=1011 bulkscore=0 lowpriorityscore=0 priorityscore=1501 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2510020000 definitions=main-2510080121 On 10/9/2025 6:34 AM, Krzysztof Kozlowski wrote: > On 09/10/2025 09:55, Bryan O'Donoghue wrote: >> On 09/10/2025 01:47, Krzysztof Kozlowski wrote: >>>> Maybe it would be possible to also use an inferred FUNCTION_ID somehow >>>> though TBH I think that's a work-around. >>> Three months ago I gave you the answer for that - it is inferred by >>> index on the list. >> >> But at least as I understand it, you can have multiple SID entries that >> need to map to a FUNCTION_ID which means you need to encode that >> inferred indexing in your driver. > > Yes. > >> >> So you can't have the iommu code just know what to do.. it has to be >> driver specific. > > Yes. > >> >> The iommu description for this platform basically lacks the data that >> _should_ be there -> FUNCTION_ID. > > No. The index tells that already. Hardware1 can have 2 iommus entries for FUNCTION_ID_1, while Hardware2 can have 3 iommus entry. It would be good to keep this info in devicetree, as it is still hardware specific (function_id is the hardware identifier). Defaulting the index would imply, the common device driver would need to book keep the iommus and hardware id in driver for every SOC. Any mismatch in order in DT and driver table would result in error too. More importantly, this need to be agreed by IOMMU maintainer to extend the iommus property. Regards, Vikash > >> >> The rule is that the DT should really describe the hardware right ? > > It already does. Same as I wrote on IRC, DT already has all the > information. Entry 0 has function ID-foo. Entry 1 has function ID-bar. > Entry 2 has function ID-bar or whatever. > > Best regards, > Krzysztof