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([2a05:6e02:1041:c10:3d0:c2e8:9f02:5c9d]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-48d17ff3659sm10970165e9.18.2026.05.05.00.43.31 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 05 May 2026 00:43:32 -0700 (PDT) Message-ID: <0d95cd5b-01a8-44b6-bd4c-a7e5fa81e181@oss.qualcomm.com> Date: Tue, 5 May 2026 09:43:31 +0200 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/2] thermal: qcom: tsens: atomic temperature read with hardware-guided retries To: Priyansh Jain , Amit Kucheria , Thara Gopinath , "Rafael J . Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba Cc: linux-pm@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, manaf.pallikunhi@oss.qualcomm.com References: <20260430054422.2461150-1-priyansh.jain@oss.qualcomm.com> <20260430054422.2461150-2-priyansh.jain@oss.qualcomm.com> Content-Language: en-US From: Daniel Lezcano In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTA1MDA3MCBTYWx0ZWRfX5wCn3G8SBs5x Gqu92uf9ZjDh4fXR+1BNqIIPHKyQH2++T0StasUFrcS1uoPIkpTLgkXN0NyPv1w416ctb7lQN4R aGNP3JMFkj11VfZ4p3X4TUcnvMFGrk0kAXiw9JUsShdmSeJwzHcNNpZvs6inbC/QgBwchAYu+UZ JhZ6SJj8Q6T8ATiPpJKnS9Mw7INihLqTa3u1inzOAo2V30GwfZJDGTqdfKxnse9qY6vGgrof7gW w+ooBG0bcrnK9Dw661+hVMhy02VtdCtHwLLC4m7g2UR2g0MJ7uocr0JbEkSZMRTCrh0pzxchG1Z yUoqW760X27LxANPa3Vb6uGRbCDVAHJQ86nbt8kwzsbdKMv8XfUL3eZ+3rGKeJ40iccT9EDfYpv 3vHN1iH9vWnqT6UcR8pWIXfz4RK6B4SPigamFTkdFEUza5mTZgrOu+FpzMCjK4wkh7NiYBiegVn RCpYNANkxc9QA73VAEA== X-Proofpoint-GUID: N6pBu0HcTwk23_-ExCs4ZTYcq-HaaI3c X-Proofpoint-ORIG-GUID: N6pBu0HcTwk23_-ExCs4ZTYcq-HaaI3c X-Authority-Analysis: v=2.4 cv=HpJG3UTS c=1 sm=1 tr=0 ts=69f99fa6 cx=c_pps a=oc9J++0uMp73DTRD5QyR2A==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=NGcC8JguVDcA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=QoiBiMnBE-sNsCsPl0cA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=iYH6xdkBrDN1Jqds4HTS:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-05_02,2026-04-30_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 spamscore=0 priorityscore=1501 lowpriorityscore=0 bulkscore=0 impostorscore=0 adultscore=0 clxscore=1015 phishscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604200000 definitions=main-2605050070 On 5/5/26 08:11, Priyansh Jain wrote: [ ... ] >>> +    .valid_bit = BIT(14), >>> +    .last_temp_mask = 0x3FF, >> >> This is GENMASK(9, 0) >> >>> +    .last_temp_resolution = 9, >> >> Please comply with the SSOT, in the init function compute the mask with: >> >>      ->last_temp_mask = GENMASK(9, 0); >> >> and remove the initialization here > Thanks for pointing this out — yes, this approach looks better. > If I understand correctly, you’re suggesting that the mask should simply > be defined in the init function as follows: > priv->feat->last_temp_mask = GENMASK(priv->feat->last_temp_resolution, 0); > ? Yes, that's correct >>>   }; >>>   static struct tsens_features ipq8074_feat = { >>> @@ -125,8 +128,7 @@ static const struct reg_field >>> tsens_v2_regfields[MAX_REGFIELDS] = { >>>       [WDOG_BARK_COUNT]  = REG_FIELD(TM_WDOG_LOG_OFF,             0, >>> 7), >>>       /* Sn_STATUS */ >>> -    REG_FIELD_FOR_EACH_SENSOR16(LAST_TEMP,       TM_Sn_STATUS_OFF, >>> 0,  11), >>> -    REG_FIELD_FOR_EACH_SENSOR16(VALID,           TM_Sn_STATUS_OFF, >>> 21,  21), >>> +    REG_FIELD_FOR_EACH_SENSOR16(LAST_TEMP,       TM_Sn_STATUS_OFF, >>> 0,  21), >>>       /* xxx_STATUS bits: 1 == threshold violated */ >>>       REG_FIELD_FOR_EACH_SENSOR16(MIN_STATUS,      TM_Sn_STATUS_OFF, >>> 16,  16), >>>       REG_FIELD_FOR_EACH_SENSOR16(LOWER_STATUS,    TM_Sn_STATUS_OFF, >>> 17,  17), >>> diff --git a/drivers/thermal/qcom/tsens.c b/drivers/thermal/qcom/tsens.c >>> index a2422ebee816..15392a17ef41 100644 >>> --- a/drivers/thermal/qcom/tsens.c >>> +++ b/drivers/thermal/qcom/tsens.c >>> @@ -315,10 +315,66 @@ static inline int code_to_degc(u32 adc_code, >>> const struct tsens_sensor *s) >>>       return degc; >>>   } >>> +static inline enum tsens_ver tsens_version(struct tsens_priv *priv) >>> +{ >>> +    return priv->feat->ver_major; >>> +} >> >> I agree putting accessor functions is a good practice but here as it >> results in duplicating the function, the benefit is discutable. >> > I did not introduce this new function; it was already present and I only > moved it from the bottom of the file to the top since it was being used > in tsens_read_temp(). > However, this change is no longer required as I am removing the use of > tsens_version() in tsens_read_temp(). As discussed earlier with Konrad, > it makes more sense to check for valid‑bit support rather than relying > on the TSENS version check in tsens_read_temp(). Ah yes, makes sense [ ... ] >>> +    } >>> + >>> +    if (temp_val[0] == temp_val[1]) >>> +        *temp = temp_val[1]; >>> +    else if (temp_val[1] == temp_val[2]) >>> +        *temp = temp_val[2]; >>> +    else >>> +        return -EAGAIN; >> >> We have a, b and c. >> >> if a == b, then return b >> else b == c, then return c >> else return -EAGAIN >> >> It is like we have two consecutives successful read. IMO that could be >> simplified to: >> >> int prev = INTMAX; >> >> /* >>   * An explanation ... >>   */ >> >> for (i = 0; i < max_retry; i++) { >> >>      int value, valid; >> >>      ret = regmap_field_read(priv->rf[field], &status); >>      if (ret) >>          return ret; >> >>      value = FIELD_GET(priv->feat->last_temp_mask, status); >> >>      valid = FIELD_GET(priv->feat->valid_bit, status) >>      if (valid) >>          return value; >> >>      if (value == prev) >>          return value; >> >>      prev = value; >> } >> >> return -EAGAIN; >> >> (Not tested) > This approach has some misalignment with the HW recommendations. > As per the HW guidelines, 3 back‑to‑back reads must be performed until a > valid read is observed. > b or c should be returned only if none of the three reads(a,b,c) report > the valid bit not set. Right I missed the point the HW recommendations is to read 3 times in any case. Maybe replace if (value == prev) continue; ?