From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stephen Boyd Subject: [PATCH 0/4] SCM fixes and updates Date: Thu, 24 Feb 2011 10:44:41 -0800 Message-ID: <1298573085-23217-1-git-send-email-sboyd@codeaurora.org> Return-path: Received: from wolverine02.qualcomm.com ([199.106.114.251]:31138 "EHLO wolverine02.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752840Ab1BXSos (ORCPT ); Thu, 24 Feb 2011 13:44:48 -0500 Sender: linux-arm-msm-owner@vger.kernel.org List-Id: linux-arm-msm@vger.kernel.org To: David Brown Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org These are a few updates to SCM. The first two patches fix some bad code generation. The next patch saves a couple instructions on the slow path and the final patch determines the cacheline size dynamically instead of statically. Stephen Boyd (4): msm: scm: Mark inline asm as volatile msm: scm: Fix improper register assignment msm: scm: Check for interruption immediately msm: scm: Get cacheline size from CTR arch/arm/mach-msm/scm.c | 75 +++++++++++++++++++++++++++------------------- 1 files changed, 44 insertions(+), 31 deletions(-) -- Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.